lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <ZwN+8xpOl4+Ggaha@vaman>
Date: Mon, 7 Oct 2024 11:55:55 +0530
From: Vinod Koul <vkoul@...nel.org>
To: Bartosz Wawrzyniak <bwawrzyn@...co.com>
Cc: Kishon Vijay Abraham I <kishon@...nel.org>,
	Christophe JAILLET <christophe.jaillet@...adoo.fr>,
	Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
	Aswath Govindraju <a-govindraju@...com>,
	Swapnil Jakhade <sjakhade@...ence.com>,
	linux-phy@...ts.infradead.org, linux-kernel@...r.kernel.org,
	xe-linux-external@...co.com, Daniel Walker <danielwa@...co.com>,
	Bartosz Stania <sbartosz@...co.com>
Subject: Re: [PATCH] phy: cadence: Sierra: Fix offset of DEQ open eye
 algorithm control register

On 03-10-24, 12:34, Bartosz Wawrzyniak wrote:
> Fix the value of SIERRA_DEQ_OPENEYE_CTRL_PREG and add a definition for
> SIERRA_DEQ_TAU_EPIOFFSET_MODE_PREG. This fixes the SGMII single link
> register configuration.
> 
> Fixes: 7a5ad9b4b98c ("phy: cadence: Sierra: Update single link PCIe register configuration")
> 

No need for this empty line here

> Signed-off-by: Bartosz Wawrzyniak <bwawrzyn@...co.com>
-- 
~Vinod

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ