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Message-Id: <20241007-wrapped-keys-dts-v8-1-05ee041f2fc1@linaro.org>
Date: Mon, 07 Oct 2024 12:02:55 +0200
From: Bartosz Golaszewski <brgl@...ev.pl>
To: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Bartosz Golaszewski <bartosz.golaszewski@...aro.org>,
Om Prakash Singh <quic_omprsing@...cinc.com>,
Neil Armstrong <neil.armstrong@...aro.org>,
Gaurav Kashyap <quic_gaurkash@...cinc.com>,
Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Subject: [PATCH v8 1/3] arm64: dts: qcom: sm8650: extend the register range
for UFS ICE
From: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
The full register range for ICE on sm8650 is 0x18000 so update the
crypto node.
Reviewed-by: Om Prakash Singh <quic_omprsing@...cinc.com>
Tested-by: Neil Armstrong <neil.armstrong@...aro.org>
Signed-off-by: Gaurav Kashyap <quic_gaurkash@...cinc.com>
Co-developed-by: Gaurav Kashyap <quic_gaurkash@...cinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@...aro.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
---
arch/arm64/boot/dts/qcom/sm8650.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index 01ac3769ffa6..5986a33ddd8b 100644
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -2595,7 +2595,7 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
ice: crypto@...8000 {
compatible = "qcom,sm8650-inline-crypto-engine",
"qcom,inline-crypto-engine";
- reg = <0 0x01d88000 0 0x8000>;
+ reg = <0 0x01d88000 0 0x18000>;
clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
};
--
2.43.0
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