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Message-Id: <20241007121249.548113-1-mark.rutland@arm.com>
Date: Mon, 7 Oct 2024 13:12:46 +0100
From: Mark Rutland <mark.rutland@....com>
To: stable@...r.kernel.org
Cc: anshuman.khandual@....com,
catalin.marinas@....com,
james.morse@....com,
linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org,
mark.rutland@....com,
suzuki.poulose@....com,
will@...nel.org
Subject: [PATCH 6.1 0/3] arm64: errata: Expand speculative SSBS workaround once more
This series is a v6.1 only backport (based on v6.1.112) of the recent MIDR
updates for the speculative SSBS workaround, which were originally posted at:
https://lore.kernel.org/linux-arm-kernel/20240930111705.3352047-1-mark.rutland@arm.com/
... and were originally merged upstream in v6.12-rc2.
The Cortex-A715 cputype definitions (which were originally merged
upstream in v6.2) are backported as a prerequisite.
This series does not apply to earlier stable trees, which will receive a
separate backport.
Mark.
Anshuman Khandual (1):
arm64: Add Cortex-715 CPU part definition
Mark Rutland (2):
arm64: cputype: Add Neoverse-N3 definitions
arm64: errata: Expand speculative SSBS workaround once more
Documentation/arm64/silicon-errata.rst | 4 ++++
arch/arm64/Kconfig | 2 ++
arch/arm64/include/asm/cputype.h | 4 ++++
arch/arm64/kernel/cpu_errata.c | 2 ++
4 files changed, 12 insertions(+)
--
2.30.2
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