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Message-ID: <20241007035616.2701-3-linux.amoon@gmail.com>
Date: Mon, 7 Oct 2024 09:26:10 +0530
From: Anand Moon <linux.amoon@...il.com>
To: Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>,
Heiko Stuebner <heiko@...ech.de>,
linux-phy@...ts.infradead.org (open list:GENERIC PHY FRAMEWORK),
linux-arm-kernel@...ts.infradead.org (moderated list:ARM/Rockchip SoC support),
linux-rockchip@...ts.infradead.org (open list:ARM/Rockchip SoC support),
linux-kernel@...r.kernel.org (open list)
Cc: Anand Moon <linux.amoon@...il.com>
Subject: [PATCH v2 2/3] phy: rockchip-pcie: Use devm_clk_get_enabled() helper
Use devm_clk_get_enabled() instead of devm_clk_get() to make the code
cleaner and avoid calling clk_disable_unprepare(), as this is exactly
what this function does. Use the dev_err_probe() helper to simplify
error handling during probe.
Signed-off-by: Anand Moon <linux.amoon@...il.com>
---
v2: Change the subject drop: Change to use/Use
v1: New patch in this series
---
drivers/phy/rockchip/phy-rockchip-pcie.c | 25 ++++++------------------
1 file changed, 6 insertions(+), 19 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-pcie.c b/drivers/phy/rockchip/phy-rockchip-pcie.c
index 51e636a1ce33..a1b4b0323e9d 100644
--- a/drivers/phy/rockchip/phy-rockchip-pcie.c
+++ b/drivers/phy/rockchip/phy-rockchip-pcie.c
@@ -277,26 +277,16 @@ static int rockchip_pcie_phy_init(struct phy *phy)
if (rk_phy->init_cnt++)
goto err_out;
- err = clk_prepare_enable(rk_phy->clk_pciephy_ref);
- if (err) {
- dev_err(&phy->dev, "Fail to enable pcie ref clock.\n");
- goto err_refclk;
- }
-
err = reset_control_assert(rk_phy->phy_rst);
if (err) {
dev_err(&phy->dev, "assert phy_rst err %d\n", err);
- goto err_reset;
+ goto err_out;
}
-err_out:
mutex_unlock(&rk_phy->pcie_mutex);
return 0;
-err_reset:
-
- clk_disable_unprepare(rk_phy->clk_pciephy_ref);
-err_refclk:
+err_out:
rk_phy->init_cnt--;
mutex_unlock(&rk_phy->pcie_mutex);
return err;
@@ -312,8 +302,6 @@ static int rockchip_pcie_phy_exit(struct phy *phy)
if (--rk_phy->init_cnt)
goto err_init_cnt;
- clk_disable_unprepare(rk_phy->clk_pciephy_ref);
-
err_init_cnt:
mutex_unlock(&rk_phy->pcie_mutex);
return 0;
@@ -375,11 +363,10 @@ static int rockchip_pcie_phy_probe(struct platform_device *pdev)
return dev_err_probe(&pdev->dev, PTR_ERR(rk_phy->phy_rst),
"missing phy property for reset controller\n");
- rk_phy->clk_pciephy_ref = devm_clk_get(dev, "refclk");
- if (IS_ERR(rk_phy->clk_pciephy_ref)) {
- dev_err(dev, "refclk not found.\n");
- return PTR_ERR(rk_phy->clk_pciephy_ref);
- }
+ rk_phy->clk_pciephy_ref = devm_clk_get_enabled(dev, "refclk");
+ if (IS_ERR(rk_phy->clk_pciephy_ref))
+ return dev_err_probe(&pdev->dev, PTR_ERR(rk_phy->clk_pciephy_ref),
+ "failed to get phyclk\n");
/* parse #phy-cells to see if it's legacy PHY model */
if (of_property_read_u32(dev->of_node, "#phy-cells", &phy_num))
--
2.44.0
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