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Message-ID: <55d1a79b-0220-4b13-b1dd-0b34eb1ddb94@oss.qualcomm.com>
Date: Mon, 7 Oct 2024 14:13:43 +0200
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley
<conor+dt@...nel.org>,
Neil Armstrong <neil.armstrong@...aro.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: qcom: sm8450 fix PIPE clock specification for
pcie1
On 6.10.2024 6:47 PM, Dmitry Baryshkov wrote:
> For historical reasons on SM8450 the second PCIe host (pcie1) also keeps
> a reference to the PIPE clock coming from the PHY. Commit e76862840660
> ("arm64: dts: qcom: sm8450: correct pcie1 phy clocks inputs to gcc") has
> updated the PHY to use #clock-cells = <1>, making just <&pcie1_phy>
> clock specification invalid. Update corresponding clock entry in the
> PCIe1 host node.
>
> /soc@...cie@...8000: Failed to get clk index: 2 ret: -22
> qcom-pcie 1c08000.pcie: Failed to get clocks
> qcom-pcie 1c08000.pcie: probe with driver qcom-pcie failed with error -22
>
> Fixes: e76862840660 ("arm64: dts: qcom: sm8450: correct pcie1 phy clocks inputs to gcc")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Konrad
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