linux-kernel - Re: [PATCH 6/6] remoteproc: qcom: Enable map/unmap and SHM bridge support

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Message-ID: <ZwP1t45ni/gk754B@hu-mojha-hyd.qualcomm.com>
Date: Mon, 7 Oct 2024 20:22:39 +0530
From: Mukesh Ojha <quic_mojha@...cinc.com>
To: <neil.armstrong@...aro.org>
CC: Bjorn Andersson <andersson@...nel.org>,
        Mathieu Poirier
	<mathieu.poirier@...aro.org>,
        Rob Herring <robh@...nel.org>,
        Krzysztof
 Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Konrad
 Dybcio <konradybcio@...nel.org>,
        Bartosz Golaszewski
	<bartosz.golaszewski@...aro.org>,
        Manivannan Sadhasivam
	<manivannan.sadhasivam@...aro.org>,
        <linux-arm-msm@...r.kernel.org>, <linux-remoteproc@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 6/6] remoteproc: qcom: Enable map/unmap and SHM bridge
 support

On Mon, Oct 07, 2024 at 10:05:08AM +0200, neil.armstrong@...aro.org wrote:
> On 04/10/2024 23:23, Mukesh Ojha wrote:
> > For Qualcomm SoCs runnning with Qualcomm EL2 hypervisor(QHEE), IOMMU
> > translation for remote processors is managed by QHEE and if the same SoC
> > run under KVM, remoteproc carveout and devmem region should be IOMMU
> > mapped from Linux PAS driver before remoteproc is brought up and
> > unmapped once it is tear down and apart from this, SHM bridge also need
> > to set up to enable memory protection on both remoteproc meta data
> > memory as well as for the carveout region.
> > 
> > Enable the support required to run Qualcomm remoteprocs on non-QHEE
> > hypervisors.
> > 
> > Signed-off-by: Mukesh Ojha <quic_mojha@...cinc.com>
> > ---
> >   drivers/remoteproc/qcom_q6v5_pas.c | 41 +++++++++++++++++++++++++++++-
> >   1 file changed, 40 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c
> > index ac339145e072..13bd13f1b989 100644
> > --- a/drivers/remoteproc/qcom_q6v5_pas.c
> > +++ b/drivers/remoteproc/qcom_q6v5_pas.c
> > @@ -122,6 +122,7 @@ struct qcom_adsp {
> >   	struct qcom_devmem_table *devmem;
> >   	struct qcom_tzmem_area *tzmem;
> > +	unsigned long sid;
> >   };
> >   static void adsp_segment_dump(struct rproc *rproc, struct rproc_dump_segment *segment,
> > @@ -310,9 +311,21 @@ static int adsp_start(struct rproc *rproc)
> >   	if (ret)
> >   		return ret;
> > +	ret = qcom_map_unmap_carveout(rproc, adsp->mem_phys, adsp->mem_size, true, true, adsp->sid);
> > +	if (ret) {
> > +		dev_err(adsp->dev, "iommu mapping failed, ret: %d\n", ret);
> > +		goto disable_irqs;
> > +	}
> > +
> > +	ret = qcom_map_devmem(rproc, adsp->devmem, true, adsp->sid);
> > +	if (ret) {
> > +		dev_err(adsp->dev, "devmem iommu mapping failed, ret: %d\n", ret);
> > +		goto unmap_carveout;
> > +	}
> > +
> >   	ret = adsp_pds_enable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
> >   	if (ret < 0)
> > -		goto disable_irqs;
> > +		goto unmap_devmem;
> >   	ret = clk_prepare_enable(adsp->xo);
> >   	if (ret)
> > @@ -400,6 +413,10 @@ static int adsp_start(struct rproc *rproc)
> >   	clk_disable_unprepare(adsp->xo);
> >   disable_proxy_pds:
> >   	adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
> > +unmap_devmem:
> > +	qcom_unmap_devmem(rproc, adsp->devmem, adsp->sid);
> > +unmap_carveout:
> > +	qcom_map_unmap_carveout(rproc, adsp->mem_phys, adsp->mem_size, false, true, adsp->sid);
> >   disable_irqs:
> >   	qcom_q6v5_unprepare(&adsp->q6v5);
> > @@ -445,6 +462,9 @@ static int adsp_stop(struct rproc *rproc)
> >   			dev_err(adsp->dev, "failed to shutdown dtb: %d\n", ret);
> >   	}
> > +	qcom_unmap_devmem(rproc, adsp->devmem, adsp->sid);
> > +	qcom_map_unmap_carveout(rproc, adsp->mem_phys, adsp->mem_size, false, true, adsp->sid);
> > +
> >   	handover = qcom_q6v5_unprepare(&adsp->q6v5);
> >   	if (handover)
> >   		qcom_pas_handover(&adsp->q6v5);
> > @@ -844,6 +864,25 @@ static int adsp_probe(struct platform_device *pdev)
> >   	}
> >   	platform_set_drvdata(pdev, adsp);
> > +	if (of_property_present(pdev->dev.of_node, "iommus")) {
> > +		struct of_phandle_args args;
> > +
> > +		ret = of_parse_phandle_with_args(pdev->dev.of_node, "iommus", "#iommu-cells", 0, &args);
> > +		if (ret < 0)
> > +			return ret;
> > +
> > +		rproc->has_iommu = true;
> > +		adsp->sid = args.args[0];
> > +		of_node_put(args.np);
> > +		ret = adsp_devmem_init(adsp);
> > +		if (ret)
> > +			return ret;
> 
> Why don't you get this table from the firmware like presumably QHEE does ?

Well, AFAIK, QHEE(EL2) has this information statically present and does
not get it from anywhere., but will confirm this twice..

-Mukesh