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Message-ID: <8a105c37-d403-4967-8862-6e097328c836@amd.com>
Date: Tue, 8 Oct 2024 11:16:43 +0530
From: Ravi Bangoria <ravi.bangoria@....com>
To: Namhyung Kim <namhyung@...nel.org>
Cc: peterz@...radead.org, mingo@...hat.com, acme@...nel.org,
 eranian@...gle.com, mark.rutland@....com,
 alexander.shishkin@...ux.intel.com, jolsa@...nel.org, irogers@...gle.com,
 adrian.hunter@...el.com, kan.liang@...ux.intel.com, tglx@...utronix.de,
 bp@...en8.de, dave.hansen@...ux.intel.com, x86@...nel.org, hpa@...or.com,
 linux-perf-users@...r.kernel.org, linux-kernel@...r.kernel.org,
 santosh.shukla@....com, ananth.narayan@....com, sandipan.das@....com,
 Ravi Bangoria <ravi.bangoria@....com>
Subject: Re: [PATCH 6/8] perf/amd/ibs: Add pmu specific minimum period

>> @@ -295,10 +296,14 @@ static int perf_ibs_init(struct perf_event *event)
>>  			/* raw max_cnt may not be set */
>>  			return -EINVAL;
>>  
>> -		/* Silently mask off lower nibble. IBS hw mandates it. */
>> -		hwc->sample_period &= ~0x0FULL;
>> -		if (!hwc->sample_period)
>> -			hwc->sample_period = 0x10;
>> +		if (event->attr.freq) {
>> +			hwc->sample_period = perf_ibs->min_period;
>> +		} else {
>> +			/* Silently mask off lower nibble. IBS hw mandates it. */
>> +			hwc->sample_period &= ~0x0FULL;
>> +			if (hwc->sample_period < perf_ibs->min_period)
>> +				return -EINVAL;
> 
> Maybe it needs to check perf_ibs->max_period as well.

We do allow event with sample_period > pmu->max_period and handle it with
"period_left" logic.

Thanks,
Ravi

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