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Message-ID: <CAMuHMdXDc55KO-d0i0_ag0udh7sGCjFfJ78aw8o1-9zaHS15+A@mail.gmail.com>
Date: Tue, 8 Oct 2024 12:08:11 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Prabhakar <prabhakar.csengg@...il.com>
Cc: Magnus Damm <magnus.damm@...il.com>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org, linux-renesas-soc@...r.kernel.org, 
	Biju Das <biju.das.jz@...renesas.com>, 
	Fabrizio Castro <fabrizio.castro.jz@...esas.com>, 
	Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH] arm64: dts: renesas: r9a09g057: Add OPP table

Hi Prabhakar,

On Fri, Oct 4, 2024 at 3:31 PM Prabhakar <prabhakar.csengg@...il.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
>
> Add OPP table for RZ/V2H(P) SoC.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>

Thanks for your patch!

> --- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> @@ -20,6 +20,39 @@ audio_extal_clk: audio-clk {
>                 clock-frequency = <0>;
>         };
>
> +       /*
> +        * The default cluster table is based on the assumption that the PLLCA55 clock
> +        * frequency is set to 1.7GHz. The PLLCA55 clock frequency can be set to
> +        * 1.7/1.6/1.5/1.1 GHz based on the BOOTPLLCA_0/1 pins (and additionally can be
> +        * clocked to 1.8GHz as well). The table below should be overridden in the board
> +        * DTS based on the PLLCA55 clock frequency.
> +        */
> +       cluster0_opp: opp-table-0 {
> +               compatible = "operating-points-v2";
> +
> +               opp-1700000000 {
> +                       opp-hz = /bits/ 64 <1700000000>;
> +                       opp-microvolt = <900000>;
> +                       clock-latency-ns = <300000>;
> +               };
> +               opp-850000000 {
> +                       opp-hz = /bits/ 64 <850000000>;
> +                       opp-microvolt = <900000>;

According to Table 10.1-2 ("Recommended Operating Range"), this should
be 800000 for this and all operating points below.

> +                       clock-latency-ns = <300000>;
> +               };
> +               opp-425000000 {
> +                       opp-hz = /bits/ 64 <425000000>;
> +                       opp-microvolt = <900000>;
> +                       clock-latency-ns = <300000>;
> +               };
> +               opp-212500000 {
> +                       opp-hz = /bits/ 64 <212500000>;
> +                       opp-microvolt = <900000>;
> +                       clock-latency-ns = <300000>;
> +                       opp-suspend;
> +               };
> +       };

The rest LGTM.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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