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Message-ID: <5e8bac8a-8e6b-423c-8e13-b73db9a226fd@quicinc.com>
Date: Tue, 8 Oct 2024 15:48:10 +0530
From: Sricharan Ramabadhran <quic_srichara@...cinc.com>
To: Kathiravan Thirumoorthy <quic_kathirav@...cinc.com>,
<andersson@...nel.org>, <konradybcio@...nel.org>, <robh@...nel.org>,
<krzk+dt@...nel.org>, <conor+dt@...nel.org>, <mturquette@...libre.com>,
<sboyd@...nel.org>, <ulf.hansson@...aro.org>,
<linus.walleij@...aro.org>, <catalin.marinas@....com>,
<p.zabel@...gutronix.de>, <geert+renesas@...der.be>,
<dmitry.baryshkov@...aro.org>, <neil.armstrong@...aro.org>,
<linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <linux-clk@...r.kernel.org>,
<linux-mmc@...r.kernel.org>, <linux-gpio@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>
CC: <quic_varada@...cinc.com>
Subject: Re: [PATCH V3 4/7] clk: qcom: add Global Clock controller (GCC)
driver for IPQ5424 SoC
>
> <snip>
>
>> +
>> +static const struct freq_tbl ftbl_gcc_qupv3_uart0_clk_src[] = {
>> + F(960000, P_XO, 10, 2, 5),
>> + F(4800000, P_XO, 5, 0, 0),
>> + F(9600000, P_XO, 2, 4, 5),
>> + F(16000000, P_GPLL0_OUT_MAIN, 10, 1, 5),
>> + F(24000000, P_XO, 1, 0, 0),
>> + F(25000000, P_GPLL0_OUT_MAIN, 16, 1, 2),
>> + F(50000000, P_GPLL0_OUT_MAIN, 16, 0, 0),
>> + F(64000000, P_GPLL0_OUT_MAIN, 12.5, 0, 0),
>> + { }
>> +};
>> +
>
> There are few more frequencies got added to this table. Can we
> incorporate that as well?
>
ok, yeah, since these patches are already reviewed, will send the
additional updates here and also for dts etc in a separate series.
Regards,
Sricharan
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