linux-kernel - Re: [PATCH 3/3] pwm: meson: Enable constant and polarity features for g12, axg, s4

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Message-ID: <1ja5fesrbv.fsf@starbuckisacylon.baylibre.com>
Date: Tue, 08 Oct 2024 14:37:56 +0200
From: Jerome Brunet <jbrunet@...libre.com>
To: neil.armstrong@...aro.org
Cc: George Stark <gnstark@...utedevices.com>,
  u.kleine-koenig@...gutronix.de,  khilman@...libre.com,
  martin.blumenstingl@...glemail.com,  linux-pwm@...r.kernel.org,
  linux-amlogic@...ts.infradead.org,  linux-arm-kernel@...ts.infradead.org,
  linux-kernel@...r.kernel.org,  kernel@...utedevices.com
Subject: Re: [PATCH 3/3] pwm: meson: Enable constant and polarity features
 for g12, axg, s4

On Tue 08 Oct 2024 at 09:31, neil.armstrong@...aro.org wrote:

> On 07/10/2024 21:32, George Stark wrote:
>> g12, axg and s4 SoC families support constant and polarity bits so enable
>> those features in corresponding chip data structs.
>> Signed-off-by: George Stark <gnstark@...utedevices.com>
>> ---
>>   drivers/pwm/pwm-meson.c | 12 ++++++++++++
>>   1 file changed, 12 insertions(+)
>> diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c
>> index 6701738c55e3..c6f032bdfe78 100644
>> --- a/drivers/pwm/pwm-meson.c
>> +++ b/drivers/pwm/pwm-meson.c
>> @@ -571,26 +571,36 @@ static const struct meson_pwm_data pwm_gxbb_ao_data = {
>>   static const struct meson_pwm_data pwm_axg_ee_data = {
>>   	.parent_names = { "xtal", "fclk_div5", "fclk_div4", "fclk_div3" },
>>   	.channels_init = meson_pwm_init_channels_meson8b_legacy,
>> +	.has_constant = true,
>> +	.has_polarity = true,
>>   };
>>     static const struct meson_pwm_data pwm_axg_ao_data = {
>>   	.parent_names = { "xtal", "axg_ao_clk81", "fclk_div4", "fclk_div5" },
>>   	.channels_init = meson_pwm_init_channels_meson8b_legacy,
>> +	.has_constant = true,
>> +	.has_polarity = true,
>>   };
>>     static const struct meson_pwm_data pwm_g12a_ee_data = {
>>   	.parent_names = { "xtal", NULL, "fclk_div4", "fclk_div3" },
>>   	.channels_init = meson_pwm_init_channels_meson8b_legacy,
>> +	.has_constant = true,
>> +	.has_polarity = true,
>>   };
>>     static const struct meson_pwm_data pwm_g12a_ao_ab_data = {
>>   	.parent_names = { "xtal", "g12a_ao_clk81", "fclk_div4", "fclk_div5" },
>>   	.channels_init = meson_pwm_init_channels_meson8b_legacy,
>> +	.has_constant = true,
>> +	.has_polarity = true,
>>   };
>>     static const struct meson_pwm_data pwm_g12a_ao_cd_data = {
>>   	.parent_names = { "xtal", "g12a_ao_clk81", NULL, NULL },
>>   	.channels_init = meson_pwm_init_channels_meson8b_legacy,
>> +	.has_constant = true,
>> +	.has_polarity = true,
>>   };
>>     static const struct meson_pwm_data pwm_meson8_v2_data = {

This needs to be splitted and adjusted as well then.
g12 and axg are covered by pwm_meson8_v2_data.

>> @@ -599,6 +609,8 @@ static const struct meson_pwm_data pwm_meson8_v2_data = {
>>     static const struct meson_pwm_data pwm_s4_data = {
>>   	.channels_init = meson_pwm_init_channels_s4,
>> +	.has_constant = true,
>> +	.has_polarity = true,
>>   };
>>     static const struct of_device_id meson_pwm_matches[] = {
>
> Reviewed-by: Neil Armstrong <neil.armstrong@...aro.org>

-- 
Jerome