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Message-ID: <20241008132052.407994-5-d-gole@ti.com>
Date: Tue, 8 Oct 2024 18:50:53 +0530
From: Dhruva Gole <d-gole@...com>
To: Nishanth Menon <nm@...com>, Vignesh Raghavendra <vigneshr@...com>,
Tero
Kristo <kristo@...nel.org>
CC: <linux-pm@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>,
Dhruva Gole <d-gole@...com>, Rob Herring <robh@...nel.org>,
Krzysztof
Kozlowski <krzk+dt@...nel.org>, Bryan Brattlof <bb@...com>
Subject: [PATCH V8 4/4] arm64: dts: ti: k3-am62p5-sk: add 1.4ghz opp entry
From: Bryan Brattlof <bb@...com>
The AM62Px reference board is capable of supplying 0v85 to the VDD_CORE
which allows the Cortex-A53s to operate at 1.4GHz according to chapter
6.6 of the SoC's data sheet[0] . Append the 1.4Ghz entry to the OPP
table to enable this frequency
[0] https://www.ti.com/lit/ds/symlink/am62p-q1.pdf
Signed-off-by: Bryan Brattlof <bb@...com>
Signed-off-by: Dhruva Gole <d-gole@...com>
---
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
index 3efa12bb7254..7f3dc39e12bc 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
@@ -128,6 +128,15 @@ led-0 {
};
};
+ opp-table {
+ /* Requires VDD_CORE at 0v85 */
+ opp-1400000000 {
+ opp-hz = /bits/ 64 <1400000000>;
+ opp-supported-hw = <0x01 0x0004>;
+ clock-latency-ns = <6000000>;
+ };
+ };
+
tlv320_mclk: clk-0 {
#clock-cells = <0>;
compatible = "fixed-clock";
--
2.34.1
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