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Message-ID: <20241009130307.GN17263@noisy.programming.kicks-ass.net>
Date: Wed, 9 Oct 2024 15:03:07 +0200
From: Peter Zijlstra <peterz@...radead.org>
To: Sebastian Andrzej Siewior <bigeasy@...utronix.de>
Cc: linux-trace-kernel@...r.kernel.org, linux-kernel@...r.kernel.org,
tglx@...utronix.de, mingo@...nel.org, juri.lelli@...hat.com,
vincent.guittot@...aro.org, dietmar.eggemann@....com,
rostedt@...dmis.org, bsegall@...gle.com, mgorman@...e.de,
vschneid@...hat.com, ankur.a.arora@...cle.com, efault@....de,
Masami Hiramatsu <mhiramat@...nel.org>,
Mathieu Desnoyers <mathieu.desnoyers@...icios.com>,
Jisheng Zhang <jszhang@...nel.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH 3/3] riscv: add PREEMPT_LAZY support
On Wed, Oct 09, 2024 at 12:50:57PM +0200, Sebastian Andrzej Siewior wrote:
> From: Jisheng Zhang <jszhang@...nel.org>
>
> riscv has switched to GENERIC_ENTRY, so adding PREEMPT_LAZY is as simple
> as adding TIF_NEED_RESCHED_LAZY related definitions and enabling
> ARCH_HAS_PREEMPT_LAZY.
>
> [bigeasy: Replace old PREEMPT_AUTO bits with new PREEMPT_LAZY ]
>
> Cc: Paul Walmsley <paul.walmsley@...ive.com>
> Cc: Palmer Dabbelt <palmer@...belt.com>
> Cc: Albert Ou <aou@...s.berkeley.edu>
> Cc: linux-riscv@...ts.infradead.org
> Signed-off-by: Jisheng Zhang <jszhang@...nel.org>
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@...utronix.de>
> ---
> arch/riscv/Kconfig | 1 +
> arch/riscv/include/asm/thread_info.h | 2 ++
> 2 files changed, 3 insertions(+)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 62545946ecf43..3516c58480612 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -39,6 +39,7 @@ config RISCV
> select ARCH_HAS_MMIOWB
> select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE
> select ARCH_HAS_PMEM_API
> + select ARCH_HAS_PREEMPT_LAZY
> select ARCH_HAS_PREPARE_SYNC_CORE_CMD
> select ARCH_HAS_PTE_DEVMAP if 64BIT && MMU
> select ARCH_HAS_PTE_SPECIAL
> diff --git a/arch/riscv/include/asm/thread_info.h b/arch/riscv/include/asm/thread_info.h
> index 9c10fb180f438..8b5a5ddea4293 100644
> --- a/arch/riscv/include/asm/thread_info.h
> +++ b/arch/riscv/include/asm/thread_info.h
> @@ -107,6 +107,7 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src);
> * - pending work-to-be-done flags are in lowest half-word
> * - other flags in upper half-word(s)
> */
> +#define TIF_NEED_RESCHED_LAZY 0 /* Lazy rescheduling needed */
> #define TIF_NOTIFY_RESUME 1 /* callback before returning to user */
> #define TIF_SIGPENDING 2 /* signal pending */
> #define TIF_NEED_RESCHED 3 /* rescheduling necessary */
So for x86 I shuffled the flags around to have the two NEED_RESCHED ones
side-by-side. Not strictly required ofcourse, but...
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