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Message-Id: <20241009-sm8650-v6-11-hmd-pocf-mdss-quad-upstream-20-v1-0-139511076a9f@linaro.org>
Date: Wed, 09 Oct 2024 14:38:41 +0800
From: Jun Nie <jun.nie@...aro.org>
To: Rob Clark <robdclark@...il.com>,
Abhinav Kumar <quic_abhinavk@...cinc.com>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>, Sean Paul <sean@...rly.run>,
Marijn Suijten <marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>, Daniel Vetter <daniel@...ll.ch>
Cc: linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org,
freedreno@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
Jun Nie <jun.nie@...aro.org>
Subject: [PATCH 0/2] drm/msm/dpu: Support different number of DSC
If DSC is enabled, the only case is with 2 DSC engines so far. And
DSC in all pipes are configured by default.
More usage case will be added, such as 4 DSC in 4:4:2 topoplogy.
Pipe number is extended in future to support quad-pipe. But only
some of 4 pipes are used in non quad-pipe. So number of DSC is
not aligned with maximum pipes.
Thus we support DSC flexiblely with this patch set with storing
the number and configuring DSC with it.
Signed-off-by: Jun Nie <jun.nie@...aro.org>
---
Jun Nie (2):
drm/msm/dpu: Do not fix number of DSC
drm/msm/dpu: configure DSC per number in use
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 2 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 18 +++++++++++-------
2 files changed, 13 insertions(+), 7 deletions(-)
---
base-commit: 6fc951e4d05d152cfc3c4442cc4e304c927dbf5e
change-id: 20241009-sm8650-v6-11-hmd-pocf-mdss-quad-upstream-20-94e7e3969089
Best regards,
--
Jun Nie <jun.nie@...aro.org>
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