linux-kernel - Re: [REGRESSION] alg: ahash: Several tests fail during boot on Turris Omnia

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Message-ID: <ZwZAExmK52txvHE8@gondor.apana.org.au>
Date: Wed, 9 Oct 2024 16:34:27 +0800
From: Herbert Xu <herbert@...dor.apana.org.au>
To: Klaus Kudielka <klaus.kudielka@...il.com>
Cc: regressions@...ts.linux.dev, linux-kernel@...r.kernel.org,
	Linux Crypto Mailing List <linux-crypto@...r.kernel.org>,
	Boris Brezillon <bbrezillon@...nel.org>,
	Arnaud Ebalard <arno@...isbad.org>
Subject: Re: [REGRESSION] alg: ahash: Several tests fail during boot on
 Turris Omnia

On Mon, Oct 07, 2024 at 10:57:00PM +0200, Klaus Kudielka wrote:
>
> I would be happy to support development of a fix, by testing on my
> spare Omnia.

As a first step, please apply the following patch and send me the
result kernel messages.

> If the above is true, the only other option I see is to declare the
> driver BROKEN, since existing CESA users are likely sitting on a time
> bomb. Some file systems do use hash algorithms, as far as I know?

I'll send a separate patch to disable the hash algorithms by lowering
their priorities.

Thanks,
-- 
Email: Herbert Xu <herbert@...dor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
--
diff --git a/drivers/crypto/marvell/cesa/cesa.c b/drivers/crypto/marvell/cesa/cesa.c
index 5fd31ba715c2..d1f069169f82 100644
--- a/drivers/crypto/marvell/cesa/cesa.c
+++ b/drivers/crypto/marvell/cesa/cesa.c
@@ -127,6 +127,8 @@ static irqreturn_t mv_cesa_int(int irq, void *priv)
 		if (!(status & mask))
 			break;
 
+		pr_err("mv_cesa_int: %d 0x%x 0x%x\n", engine->id, status, mask);
+
 		/*
 		 * TODO: avoid clearing the FPGA_INT_STATUS if this not
 		 * relevant on some platforms.
diff --git a/drivers/crypto/marvell/cesa/hash.c b/drivers/crypto/marvell/cesa/hash.c
index 8d84ad45571c..ec4e9db1c8ab 100644
--- a/drivers/crypto/marvell/cesa/hash.c
+++ b/drivers/crypto/marvell/cesa/hash.c
@@ -167,6 +167,8 @@ static void mv_cesa_ahash_std_step(struct ahash_request *req)
 	unsigned int digsize;
 	int i;
 
+	pr_err("mv_cesa_ahash_step_req: %d %p\n", engine->id, req);
+
 	mv_cesa_adjust_op(engine, &creq->op_tmpl);
 	if (engine->pool)
 		memcpy(engine->sram_pool, &creq->op_tmpl,
@@ -397,6 +399,8 @@ static void mv_cesa_ahash_complete(struct crypto_async_request *req)
 	}
 
 	atomic_sub(ahashreq->nbytes, &engine->load);
+
+	pr_err("mv_cesa_ahash_complete: %d %p\n", engine->id, ahashreq);
 }
 
 static void mv_cesa_ahash_prepare(struct crypto_async_request *req,
@@ -418,6 +422,8 @@ static void mv_cesa_ahash_req_cleanup(struct crypto_async_request *req)
 	struct ahash_request *ahashreq = ahash_request_cast(req);
 	struct mv_cesa_ahash_req *creq = ahash_request_ctx(ahashreq);
 
+	pr_err("mv_cesa_ahash_req_cleanup: %d %p\n", creq->base.engine->id, ahashreq);
+
 	if (creq->last_req)
 		mv_cesa_ahash_last_cleanup(ahashreq);
 
@@ -796,6 +802,7 @@ static int mv_cesa_ahash_queue_req(struct ahash_request *req)
 	engine = mv_cesa_select_engine(req->nbytes);
 	mv_cesa_ahash_prepare(&req->base, engine);
 
+	pr_err("mv_cesa_ahash_queue_req: %d %p\n", engine->id, req);
 	ret = mv_cesa_queue_req(&req->base, &creq->base);
 
 	if (mv_cesa_req_needs_cleanup(&req->base, ret))