linux-kernel - Re: [PATCH net-next v3 2/2] net: phy: aquantia: allow forcing order of MDI pairs

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <114b4c03-5d16-42ed-945d-cf78eabea12b@nvidia.com>
Date: Fri, 11 Oct 2024 18:37:23 +0100
From: Jon Hunter <jonathanh@...dia.com>
To: Daniel Golle <daniel@...rotopia.org>,
 "David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>,
 Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Andrew Lunn <andrew@...n.ch>,
 Heiner Kallweit <hkallweit1@...il.com>, Russell King
 <linux@...linux.org.uk>, Christian Marangi <ansuelsmth@...il.com>,
 Bartosz Golaszewski <bartosz.golaszewski@...aro.org>,
 Robert Marko <robimarko@...il.com>, Paweł Owoc
 <frut3k7@...il.com>, netdev@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org
Cc: "linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>
Subject: Re: [PATCH net-next v3 2/2] net: phy: aquantia: allow forcing order
 of MDI pairs

Hi Daniel,

On 04/10/2024 17:18, Daniel Golle wrote:
> Despite supporting Auto MDI-X, it looks like Aquantia only supports
> swapping pair (1,2) with pair (3,6) like it used to be for MDI-X on
> 100MBit/s networks.
> 
> When all 4 pairs are in use (for 1000MBit/s or faster) the link does not
> come up with pair order is not configured correctly, either using
> MDI_CFG pin or using the "PMA Receive Reserved Vendor Provisioning 1"
> register.
> 
> Normally, the order of MDI pairs being either ABCD or DCBA is configured
> by pulling the MDI_CFG pin.
> 
> However, some hardware designs require overriding the value configured
> by that bootstrap pin. The PHY allows doing that by setting a bit in
> "PMA Receive Reserved Vendor Provisioning 1" register which allows
> ignoring the state of the MDI_CFG pin and another bit configuring
> whether the order of MDI pairs should be normal (ABCD) or reverse
> (DCBA). Pair polarity is not affected and remains identical in both
> settings.
> 
> Introduce property "marvell,mdi-cfg-order" which allows forcing either
> normal or reverse order of the MDI pairs from DT.
> 
> If the property isn't present, the behavior is unchanged and MDI pair
> order configuration is untouched (ie. either the result of MDI_CFG pin
> pull-up/pull-down, or pair order override already configured by the
> bootloader before Linux is started).
> 
> Forcing normal pair order is required on the Adtran SDG-8733A Wi-Fi 7
> residential gateway.
> 
> Signed-off-by: Daniel Golle <daniel@...rotopia.org>
> ---
> v3: use u32 'marvell,mdi-cfg-order' instead of two mutually exclusive
>      properties as suggested
> v2: add missing 'static' keyword, improve commit description
> 
>   drivers/net/phy/aquantia/aquantia_main.c | 33 ++++++++++++++++++++++++
>   1 file changed, 33 insertions(+)
> 
> diff --git a/drivers/net/phy/aquantia/aquantia_main.c b/drivers/net/phy/aquantia/aquantia_main.c
> index 4d156d406bab..dcad3fa1ddc3 100644
> --- a/drivers/net/phy/aquantia/aquantia_main.c
> +++ b/drivers/net/phy/aquantia/aquantia_main.c
> @@ -11,6 +11,7 @@
>   #include <linux/module.h>
>   #include <linux/delay.h>
>   #include <linux/bitfield.h>
> +#include <linux/of.h>
>   #include <linux/phy.h>
>   
>   #include "aquantia.h"
> @@ -71,6 +72,11 @@
>   #define MDIO_AN_TX_VEND_INT_MASK2		0xd401
>   #define MDIO_AN_TX_VEND_INT_MASK2_LINK		BIT(0)
>   
> +#define PMAPMD_RSVD_VEND_PROV			0xe400
> +#define PMAPMD_RSVD_VEND_PROV_MDI_CONF		GENMASK(1, 0)
> +#define PMAPMD_RSVD_VEND_PROV_MDI_REVERSE	BIT(0)
> +#define PMAPMD_RSVD_VEND_PROV_MDI_FORCE		BIT(1)
> +
>   #define MDIO_AN_RX_LP_STAT1			0xe820
>   #define MDIO_AN_RX_LP_STAT1_1000BASET_FULL	BIT(15)
>   #define MDIO_AN_RX_LP_STAT1_1000BASET_HALF	BIT(14)
> @@ -485,6 +491,29 @@ static void aqr107_chip_info(struct phy_device *phydev)
>   		   fw_major, fw_minor, build_id, prov_id);
>   }
>   
> +static int aqr107_config_mdi(struct phy_device *phydev)
> +{
> +	struct device_node *np = phydev->mdio.dev.of_node;
> +	u32 mdi_conf;
> +	int ret;
> +
> +	ret = of_property_read_u32(np, "marvell,mdi-cfg-order", &mdi_conf);
> +
> +	/* Do nothing in case property "marvell,mdi-cfg-order" is not present */
> +	if (ret == -ENOENT)
> +		return 0;


This change is breaking networking for one of our Tegra boards and on 
boot I am seeing ...

  tegra-mgbe 6800000.ethernet eth0: Register MEM_TYPE_PAGE_POOL RxQ-0
  tegra-mgbe 6800000.ethernet eth0: __stmmac_open: Cannot attach to PHY
  (error: -22)

The issue is that of_property_read_u32() does not return -ENOENT if the 
property is missing, it actually returns -EINVAL. See the description of 
of_property_read_variable_u32_array() which is called by 
of_property_read_u32().

Andrew, can we drop this change from -next until this is fixed?

Thanks!
Jon

-- 
nvpublic