linux-kernel - [PATCH v6 2/4] i2c: npcm: Modify the client address assignment

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Message-Id: <20241011055231.9826-3-kfting@nuvoton.com>
Date: Fri, 11 Oct 2024 13:52:29 +0800
From: Tyrone Ting <warp5tw@...il.com>
To: avifishman70@...il.com,
	tmaimon77@...il.com,
	tali.perry1@...il.com,
	venture@...gle.com,
	yuenn@...gle.com,
	benjaminfair@...gle.com,
	andi.shyti@...nel.org,
	andriy.shevchenko@...ux.intel.com,
	wsa@...nel.org,
	rand.sec96@...il.com,
	wsa+renesas@...g-engineering.com,
	warp5tw@...il.com,
	tali.perry@...oton.com,
	Avi.Fishman@...oton.com,
	tomer.maimon@...oton.com,
	KWLIU@...oton.com,
	JJLIU0@...oton.com,
	kfting@...oton.com
Cc: openbmc@...ts.ozlabs.org,
	linux-i2c@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: [PATCH v6 2/4] i2c: npcm: Modify the client address assignment

From: Tyrone Ting <kfting@...oton.com>

Store the client address earlier since it might get called in
the i2c_recover_bus() logic flow at the early stage of
npcm_i2c_master_xfer().

Signed-off-by: Tyrone Ting <kfting@...oton.com>
Reviewed-by: Tali Perry <tali.perry1@...il.com>
---
 drivers/i2c/busses/i2c-npcm7xx.c | 24 +++++++++++++++++++++++-
 1 file changed, 23 insertions(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-npcm7xx.c b/drivers/i2c/busses/i2c-npcm7xx.c
index c96a25d37c14..349492f114e7 100644
--- a/drivers/i2c/busses/i2c-npcm7xx.c
+++ b/drivers/i2c/busses/i2c-npcm7xx.c
@@ -2155,6 +2155,19 @@ static int npcm_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
 
 	} while (time_is_after_jiffies(time_left) && bus_busy);
 
+	/*
+	 * Previously, the address was stored w/o left-shift by one bit and
+	 * with that shift in the following call to npcm_i2c_master_start_xmit().
+	 *
+	 * Since there are cases that the i2c_recover_bus() gets called at the
+	 * early stage of npcm_i2c_master_xfer(), the address is stored with
+	 * the shift and used in the i2c_recover_bus().
+	 *
+	 * The address is stored from bit 1 to bit 7 in the register for
+	 * sending the i2c address later so it's left-shifted by 1 bit.
+	 */
+	bus->dest_addr = i2c_8bit_addr_from_msg(msg0);
+
 	/*
 	 * Check the BER (bus error) state, when ber_state is true, it means that the module
 	 * detects the bus error which is caused by some factor like that the electricity
@@ -2165,6 +2178,16 @@ static int npcm_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
 	 * bus is busy.
 	 */
 	if (bus_busy || bus->ber_state) {
+		/*
+		 * Since the transfer might be a read operation, remove the I2C_M_RD flag
+		 * from the bus->dest_addr for the i2c_recover_bus() call later.
+		 *
+		 * The i2c_recover_bus() uses the address in a write direction to recover
+		 * the i2c bus if some error condition occurs.
+		 */
+		if (bus->dest_addr & I2C_M_RD)
+			bus->dest_addr &= ~I2C_M_RD;
+
 		iowrite8(NPCM_I2CCST_BB, bus->reg + NPCM_I2CCST);
 		npcm_i2c_reset(bus);
 		i2c_recover_bus(adap);
@@ -2172,7 +2195,6 @@ static int npcm_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
 	}
 
 	npcm_i2c_init_params(bus);
-	bus->dest_addr = slave_addr;
 	bus->msgs = msgs;
 	bus->msgs_num = num;
 	bus->cmd_err = 0;
-- 
2.34.1