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Message-ID: <CAA8EJppMu5o7juhKUN2Y_4CRYKtaWN9G01aPU2ZfksE_tzjqCQ@mail.gmail.com>
Date: Fri, 11 Oct 2024 10:13:07 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Jun Nie <jun.nie@...aro.org>
Cc: Rob Clark <robdclark@...il.com>, Abhinav Kumar <quic_abhinavk@...cinc.com>,
Sean Paul <sean@...rly.run>, Marijn Suijten <marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>, Daniel Vetter <daniel@...ll.ch>, linux-arm-msm@...r.kernel.org,
dri-devel@...ts.freedesktop.org, freedreno@...ts.freedesktop.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 09/14] drm/msm/dpu: blend pipes per mixer pairs config
On Fri, 11 Oct 2024 at 10:11, Jun Nie <jun.nie@...aro.org> wrote:
>
> Dmitry Baryshkov <dmitry.baryshkov@...aro.org> 于2024年10月11日周五 15:03写道:
> >
> > On Fri, 11 Oct 2024 at 09:40, Jun Nie <jun.nie@...aro.org> wrote:
> > >
> > > Dmitry Baryshkov <dmitry.baryshkov@...aro.org> 于2024年10月10日周四 21:15写道:
> > > >
> > > > On Wed, Oct 09, 2024 at 04:50:22PM GMT, Jun Nie wrote:
> > > > > Blend pipes by set of mixer pair config. The first 2 pipes are for left
> > > > > half screen with the first set of mixer pair config. And the later 2 pipes
> > > > > are for right in quad pipe case.
> > > > >
> > > > > Signed-off-by: Jun Nie <jun.nie@...aro.org>
> > > > > ---
> > > > > drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 38 ++++++++++++++++++-----------
> > > > > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 1 +
> > > > > 2 files changed, 25 insertions(+), 14 deletions(-)
> > > > >
> > > > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> > > > > index 43d9817cd858f..66f745399a602 100644
> > > > > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> > > > > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> > > > > @@ -442,7 +442,7 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc,
> > > > > const struct msm_format *format;
> > > > > struct dpu_hw_ctl *ctl = mixer->lm_ctl;
> > > > >
> > > > > - uint32_t lm_idx, i;
> > > > > + uint32_t lm_idx, lm_pair, i, pipe_idx;
> > > > > bool bg_alpha_enable = false;
> > > > > DECLARE_BITMAP(fetch_active, SSPP_MAX);
> > > > >
> > > > > @@ -463,15 +463,20 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc,
> > > > > if (pstate->stage == DPU_STAGE_BASE && format->alpha_enable)
> > > > > bg_alpha_enable = true;
> > > > >
> > > > > - for (i = 0; i < PIPES_PER_LM_PAIR; i++) {
> > > > > - if (!pstate->pipe[i].sspp)
> > > > > - continue;
> > > > > - set_bit(pstate->pipe[i].sspp->idx, fetch_active);
> > > > > - _dpu_crtc_blend_setup_pipe(crtc, plane,
> > > > > - mixer, cstate->num_mixers,
> > > > > - pstate->stage,
> > > > > - format, fb ? fb->modifier : 0,
> > > > > - &pstate->pipe[i], i, stage_cfg);
> > > > > + /* loop pipe per mixer pair */
> > > > > + for (lm_pair = 0; lm_pair < PIPES_PER_PLANE / 2; lm_pair++) {
> > > > > + for (i = 0; i < PIPES_PER_LM_PAIR; i++) {
> > > > > + pipe_idx = i + lm_pair * PIPES_PER_LM_PAIR;
> > > > > + if (!pstate->pipe[pipe_idx].sspp)
> > > > > + continue;
> > > > > + set_bit(pstate->pipe[pipe_idx].sspp->idx, fetch_active);
> > > > > + _dpu_crtc_blend_setup_pipe(crtc, plane,
> > > > > + mixer, cstate->num_mixers,
> > > > > + pstate->stage,
> > > > > + format, fb ? fb->modifier : 0,
> > > > > + &pstate->pipe[pipe_idx], i,
> > > > > + &stage_cfg[lm_pair]);
> > > > > + }
> > > > > }
> > > > >
> > > > > /* blend config update */
> > > > > @@ -503,7 +508,7 @@ static void _dpu_crtc_blend_setup(struct drm_crtc *crtc)
> > > > > struct dpu_crtc_mixer *mixer = cstate->mixers;
> > > > > struct dpu_hw_ctl *ctl;
> > > > > struct dpu_hw_mixer *lm;
> > > > > - struct dpu_hw_stage_cfg stage_cfg;
> > > > > + struct dpu_hw_stage_cfg stage_cfg[LM_PAIRS_PER_PLANE];
> > > >
> > > > After seeing this code, can we define STAGES_PER_PLANE (and
> > > > also keep PLANES_PER_STAGE defined to 2)?
> > > >
> > > Could you elaborate it? Stages describe how many layers to be blended.
> > > Plane is a DRM concept that describe a buffer to be display in specific
> > > display driver. Plane is already mapped to SSPP/multi-rect in DPU driver
> > > in blending stage level. So I am confused here.
> >
> > We have dpu_hw_stage_cfg, you are adding a second instance of it. So
> > we now have two stages per plane.
>
> So you suggest to replace LM_PAIRS_PER_PLANE with STAGES_PER_PLANE,
> right? I assume a stage is coupled with a LM pair.
>
> But for PLANES_PER_STAGE, I am still confused. A stage or a LM pair can
> involve many SSPP layers. How it related to planes? Plane is a concepts from
> higher level.
PIPES_PER_STAGE, excuse me.
--
With best wishes
Dmitry
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