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Message-ID: <ZwkFWVC3_5xr6OQW@smile.fi.intel.com>
Date: Fri, 11 Oct 2024 14:00:41 +0300
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: Tyrone Ting <warp5tw@...il.com>
Cc: avifishman70@...il.com, tmaimon77@...il.com, tali.perry1@...il.com,
	venture@...gle.com, yuenn@...gle.com, benjaminfair@...gle.com,
	andi.shyti@...nel.org, wsa@...nel.org, rand.sec96@...il.com,
	wsa+renesas@...g-engineering.com, tali.perry@...oton.com,
	Avi.Fishman@...oton.com, tomer.maimon@...oton.com,
	KWLIU@...oton.com, JJLIU0@...oton.com, kfting@...oton.com,
	openbmc@...ts.ozlabs.org, linux-i2c@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v6 2/4] i2c: npcm: Modify the client address assignment

On Fri, Oct 11, 2024 at 01:52:29PM +0800, Tyrone Ting wrote:
> From: Tyrone Ting <kfting@...oton.com>
> 
> Store the client address earlier since it might get called in
> the i2c_recover_bus() logic flow at the early stage of
> npcm_i2c_master_xfer().

...

> +	/*
> +	 * Previously, the address was stored w/o left-shift by one bit and
> +	 * with that shift in the following call to npcm_i2c_master_start_xmit().
> +	 *
> +	 * Since there are cases that the i2c_recover_bus() gets called at the
> +	 * early stage of npcm_i2c_master_xfer(), the address is stored with
> +	 * the shift and used in the i2c_recover_bus().
> +	 *
> +	 * The address is stored from bit 1 to bit 7 in the register for
> +	 * sending the i2c address later so it's left-shifted by 1 bit.
> +	 */

I would rephrase it a bit like

	/*
	 * Previously, the 7-bit address was stored and being converted to
	 * the address of event in the following call to npcm_i2c_master_start_xmit().
	 *
	 * Since there are cases that the i2c_recover_bus() gets called at the
	 * early stage of npcm_i2c_master_xfer(), the address of event is stored
	 * and then used in the i2c_recover_bus().
	 */

(E.g., the last paragraph just describes 101 about I2C 7-bit addresses usage
 and may be dropped completely.)

> +	bus->dest_addr = i2c_8bit_addr_from_msg(msg0);

...

> +		/*
> +		 * Since the transfer might be a read operation, remove the I2C_M_RD flag
> +		 * from the bus->dest_addr for the i2c_recover_bus() call later.
> +		 *
> +		 * The i2c_recover_bus() uses the address in a write direction to recover
> +		 * the i2c bus if some error condition occurs.
> +		 */

> +		if (bus->dest_addr & I2C_M_RD)

Redundant.

> +			bus->dest_addr &= ~I2C_M_RD;

-- 
With Best Regards,
Andy Shevchenko



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