linux-kernel - Re: [PATCH v4 3/4] x86/mce: Add zhaoxin.c to support Zhaoxin MCA

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Message-ID: <830f88fd-4f05-478e-aace-e6ca20413133@zhaoxin.com>
Date: Sat, 12 Oct 2024 17:06:15 +0800
From: Tony W Wang-oc <TonyWWang-oc@...oxin.com>
To: "Zhuo, Qiuxu" <qiuxu.zhuo@...el.com>, "tglx@...utronix.de"
	<tglx@...utronix.de>, "mingo@...hat.com" <mingo@...hat.com>, "bp@...en8.de"
	<bp@...en8.de>, "dave.hansen@...ux.intel.com" <dave.hansen@...ux.intel.com>,
	"x86@...nel.org" <x86@...nel.org>, "hpa@...or.com" <hpa@...or.com>, "Luck,
 Tony" <tony.luck@...el.com>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>, "linux-edac@...r.kernel.org"
	<linux-edac@...r.kernel.org>
CC: "CobeChen@...oxin.com" <CobeChen@...oxin.com>, "TimGuo@...oxin.com"
	<TimGuo@...oxin.com>, "LeoLiu-oc@...oxin.com" <LeoLiu-oc@...oxin.com>, "Lyle
 Li" <LyleLi@...oxin.com>
Subject: Re: [PATCH v4 3/4] x86/mce: Add zhaoxin.c to support Zhaoxin MCA



On 2024/10/12 14:41, Zhuo, Qiuxu wrote:
> 
> 
>> From: Tony W Wang-oc <TonyWWang-oc@...oxin.com>
>> [...]
>> +config X86_MCE_ZHAOXIN
>> +     def_bool y
>> +     prompt "Zhaoxin MCE features"
>> +     depends on X86_MCE_INTEL
>> +     help
>> +       Additional support for zhaoxin specific MCE features such as
> 
> s/zhaoxin/Zhaoxin
> 
>> +       the corrected machine check interrupt.
>> +
>>   config X86_MCE_AMD
>>        def_bool y
>>        prompt "AMD MCE features"
>> diff --git a/arch/x86/kernel/cpu/mce/Makefile
>> b/arch/x86/kernel/cpu/mce/Makefile
>> index 015856abd..2e863e78d 100644
>> --- a/arch/x86/kernel/cpu/mce/Makefile
>> +++ b/arch/x86/kernel/cpu/mce/Makefile
>> @@ -5,7 +5,7 @@ obj-$(CONFIG_X86_ANCIENT_MCE) += winchip.o p5.o
>>   obj-$(CONFIG_X86_MCE_INTEL)  += intel.o
>>   obj-$(CONFIG_X86_MCE_AMD)    += amd.o
>>   obj-$(CONFIG_X86_MCE_THRESHOLD) += threshold.o
>> -
>> +obj-$(CONFIG_X86_MCE_ZHAOXIN)   += zhaoxin.o
> 
> Move this newly added item just after AMD's, so they're sorted in vendors.
> And keep a blank line here as it was.
> 
>>   mce-inject-y                 := inject.o
>>   obj-$(CONFIG_X86_MCE_INJECT) += mce-inject.o
>>
>> [...]
>> --- /dev/null
>> +++ b/arch/x86/kernel/cpu/mce/zhaoxin.c
>> @@ -0,0 +1,65 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * Zhaoxin specific MCE features
>> + * Author: Lyle Li
>> + */
>> +#include <asm/msr.h>
>> +#include "internal.h"
>> +
>> +static void mce_zhaoxin_apply_mce_broadcast(struct cpuinfo_x86 *c) {
>> +     struct mca_config *cfg = &mca_cfg;
>> +
>> +     /* Older CPUs do not do MCE broadcast */
> 
> s/MCE broadcast/MCE broadcast:/
> 
>> +     if (c->x86 < 6)
>> +             return;
>> +     /*
>> +      * All newer Zhaoxin and Centaur CPUs support MCE broadcasting.
>> Enable
>> +      * synchronization with a one second timeout.
>> +      */
> 
> 
> Instead of copying and pasting the redundant comments, could you use Dave's concise comments as suggested in:
> 
>     https://lore.kernel.org/all/a25f878e-83d9-440a-9741-4cf86db4a716@intel.com/
> 
> /* All newer ones do: */
>> +     if (c->x86 > 6)
>> +             goto mce_broadcast;
>> +
> 
> /* Family 6 is mixed: */
>> +     if (c->x86_vendor == X86_VENDOR_CENTAUR) {
>> +             if (c->x86_model == 0xf && c->x86_stepping >= 0xe)
>> +                     goto mce_broadcast;
>> +     } else if (c->x86_vendor == X86_VENDOR_ZHAOXIN) {
>> +             if (c->x86_model == 0x19 || c->x86_model == 0x1f)
>> +                     goto mce_broadcast;
>> +     }
>> +
>> +     return;
>> [...]

Thank you for your review.
Should I add the tag for this patch:
     Reviewed-by: Qiuxu Zhuo <qiuxu.zhuo@...el.com>

Sincerely
TonyWWang-oc