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Message-ID: <20241013132520.2848-1-jszhang@kernel.org>
Date: Sun, 13 Oct 2024 21:25:20 +0800
From: Jisheng Zhang <jszhang@...nel.org>
To: Russell King <linux@...linux.org.uk>,
Vladimir Murzin <vladimir.murzin@....com>
Cc: linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: [PATCH] ARM: NOMMU: Fix exc_ret for stack frame type
commit 72cd4064fcca ("ARM: 8830/1: NOMMU: Toggle only bits in
EXC_RETURN we are really care of") only sets BIT[3] for Thread mode
and BIT[2] for PSP, it leaves BIT[4] untouched. But there's such a
case: the pre-linux env makes use of FPU then the BIT[4] in 'lr' is
cleared, this brings an umatch issue since the NOMMU kernel doesn't
support FPU yet. Before the above commit, we hardcode the exc_ret
as 0xfffffffd, so the flow works fine.
Fix this issue by explicitly set BIT[4] which means using standard
stack frame.
Fixes: 72cd4064fcca ("ARM: 8830/1: NOMMU: Toggle only bits in EXC_RETURN we are really care of")
Signed-off-by: Jisheng Zhang <jszhang@...nel.org>
---
arch/arm/include/asm/v7m.h | 1 +
arch/arm/mm/proc-v7m.S | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/arm/include/asm/v7m.h b/arch/arm/include/asm/v7m.h
index 4512f7e1918f..3aea6d3c97ee 100644
--- a/arch/arm/include/asm/v7m.h
+++ b/arch/arm/include/asm/v7m.h
@@ -51,6 +51,7 @@
*/
#define EXC_RET_STACK_MASK 0x00000004
#define EXC_RET_THREADMODE_PROCESSSTACK (3 << 2)
+#define EXC_RET_FTYPE (1 << 4)
/* Cache related definitions */
diff --git a/arch/arm/mm/proc-v7m.S b/arch/arm/mm/proc-v7m.S
index ed7781c84341..fdae077d2654 100644
--- a/arch/arm/mm/proc-v7m.S
+++ b/arch/arm/mm/proc-v7m.S
@@ -138,6 +138,7 @@ __v7m_setup_cont:
1: cpsid i
/* Calculate exc_ret */
orr r10, lr, #EXC_RET_THREADMODE_PROCESSSTACK
+ orr r10, #EXC_RET_FTYPE
ldmia sp, {r0-r3, r12}
str r5, [r12, #11 * 4] @ restore the original SVC vector entry
mov lr, r6 @ restore LR
--
2.45.2
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