[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20241014170105.GA611115@bhelgaas>
Date: Mon, 14 Oct 2024 12:01:05 -0500
From: Bjorn Helgaas <helgaas@...nel.org>
To: Stanimir Varbanov <svarbanov@...e.de>
Cc: linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-rpi-kernel@...ts.infradead.org, linux-pci@...r.kernel.org,
Broadcom internal kernel review list <bcm-kernel-feedback-list@...adcom.com>,
Thomas Gleixner <tglx@...utronix.de>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Florian Fainelli <florian.fainelli@...adcom.com>,
Jim Quinlan <jim2101024@...il.com>,
Nicolas Saenz Julienne <nsaenz@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>, kw@...ux.com,
Philipp Zabel <p.zabel@...gutronix.de>,
Andrea della Porta <andrea.porta@...e.com>,
Phil Elwell <phil@...pberrypi.com>,
Jonathan Bell <jonathan@...pberrypi.com>
Subject: Re: [PATCH v3 06/11] PCI: brcmstb: Avoid turn off of bridge reset
On Mon, Oct 14, 2024 at 04:07:05PM +0300, Stanimir Varbanov wrote:
> On PCIe turn off avoid shutdown of bridge reset,
> by introducing a quirk flag.
Can you include something here about *why* we need this change? I
think the RESCAL comment below would be a good start.
I think this should be squashed with the next commit that adds the use
of CFG_QUIRK_AVOID_BRIDGE_SHUTDOWN. Otherwise this commit doesn't
have an obvious reason.
> Signed-off-by: Stanimir Varbanov <svarbanov@...e.de>
> ---
> v2 -> v3:
> - Added more descriptive comment on CFG_QUIRK_AVOID_BRIDGE_SHUTDOWN quirk.
>
> drivers/pci/controller/pcie-brcmstb.c | 17 +++++++++++++++--
> 1 file changed, 15 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
> index b76c16287f37..757a1646d53c 100644
> --- a/drivers/pci/controller/pcie-brcmstb.c
> +++ b/drivers/pci/controller/pcie-brcmstb.c
> @@ -234,10 +234,20 @@ struct inbound_win {
> u64 cpu_addr;
> };
>
> +/*
> + * The RESCAL block is tied to PCIe controller #1, regardless of the number of
> + * controllers, and turning off PCIe controller #1 prevents access to the RESCAL
> + * register blocks, therefore not other controller can access this register
> + * space, and depending upon the bus fabric we may get a timeout (UBUS/GISB),
> + * or a hang (AXI).
s/not other/no other/
> + */
> +#define CFG_QUIRK_AVOID_BRIDGE_SHUTDOWN BIT(0)
> +
> struct pcie_cfg_data {
> const int *offsets;
> const enum pcie_soc_base soc_base;
> const bool has_phy;
> + const u32 quirks;
> u8 num_inbound_wins;
> int (*perst_set)(struct brcm_pcie *pcie, u32 val);
> int (*bridge_sw_init_set)(struct brcm_pcie *pcie, u32 val);
> @@ -290,6 +300,7 @@ struct brcm_pcie {
> struct subdev_regulators *sr;
> bool ep_wakeup_capable;
> bool has_phy;
> + u32 quirks;
> u8 num_inbound_wins;
> };
>
> @@ -1539,8 +1550,9 @@ static int brcm_pcie_turn_off(struct brcm_pcie *pcie)
> u32p_replace_bits(&tmp, 1, PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK);
> writel(tmp, base + HARD_DEBUG(pcie));
>
> - /* Shutdown PCIe bridge */
> - ret = pcie->bridge_sw_init_set(pcie, 1);
> + if (!(pcie->quirks & CFG_QUIRK_AVOID_BRIDGE_SHUTDOWN))
> + /* Shutdown PCIe bridge */
> + ret = pcie->bridge_sw_init_set(pcie, 1);
>
> return ret;
> }
> @@ -1854,6 +1866,7 @@ static int brcm_pcie_probe(struct platform_device *pdev)
> pcie->perst_set = data->perst_set;
> pcie->bridge_sw_init_set = data->bridge_sw_init_set;
> pcie->has_phy = data->has_phy;
> + pcie->quirks = data->quirks;
> pcie->num_inbound_wins = data->num_inbound_wins;
>
> pcie->base = devm_platform_ioremap_resource(pdev, 0);
> --
> 2.43.0
>
Powered by blists - more mailing lists