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Message-ID: <6a060f86-82af-4d39-9ab8-a377650e6bf3@linaro.org>
Date: Mon, 14 Oct 2024 22:36:50 +0100
From: Bryan O'Donoghue <bryan.odonoghue@...aro.org>
To: Mukesh Kumar Savaliya <quic_msavaliy@...cinc.com>,
 konrad.dybcio@...aro.org, andersson@...nel.org, andi.shyti@...nel.org,
 linux-arm-msm@...r.kernel.org, dmaengine@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-i2c@...r.kernel.org,
 conor+dt@...nel.org, agross@...nel.org, devicetree@...r.kernel.org,
 vkoul@...nel.org, linux@...blig.org, dan.carpenter@...aro.org,
 Frank.Li@....com, konradybcio@...nel.org, krzk+dt@...nel.org, robh@...nel.org
Subject: Re: [PATCH v3 4/4] i2c: i2c-qcom-geni: Enable i2c controller sharing
 between two subsystems

On 27/09/2024 07:31, Mukesh Kumar Savaliya wrote:
> Add support to share I2C SE by two Subsystems in a mutually exclusive way.

As I read this the question jumps out "what is a subsystem" - in Linux 
speak subsystem is say a bus or a memory management method but, here 
what you really mean if I've understood the intent of this series is to 
share the serial engine between two different bus-masters or perhaps a 
better description is "system agent".

Please make that delination clear - its not two Linux subsystems but two 
different Qcom SoC bus masters right ?

For example the APSS - Application Specific Sub Subsystem - where Linux 
runs and say cDSP - the compute DSP on qcom SoCs.

I'd rename this patch to make that clear - because "between two 
subsystems" if you aren't intimately versed in qcom's architecture 
suggests that a Linux i2c and spi driver are somehow muxing pins ..

Really this is a type of AMP - asymmetric multi processing.

"i2c: i2c-qcom-geni: Enable i2c controller sharing between two different 
bus masters"

And I'd mention in the commit log specific examples - APSS yes we get 
but what is the other system agent in your use-case ?

A DSP ? Some other processor in the SoC ?

Anyway highlight one use-case for this AMP case, please.

---
bod





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