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Message-ID: <CACD3sJbw8QVsfNW=Rz4WfzQ3-+d=Y_=U1kpkneSNmfDcGugChQ@mail.gmail.com>
Date: Mon, 14 Oct 2024 15:55:25 +0800
From: Tyrone Ting <warp5tw@...il.com>
To: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Cc: avifishman70@...il.com, tmaimon77@...il.com, tali.perry1@...il.com, 
	venture@...gle.com, yuenn@...gle.com, benjaminfair@...gle.com, 
	andi.shyti@...nel.org, wsa@...nel.org, rand.sec96@...il.com, 
	wsa+renesas@...g-engineering.com, tali.perry@...oton.com, 
	Avi.Fishman@...oton.com, tomer.maimon@...oton.com, KWLIU@...oton.com, 
	JJLIU0@...oton.com, kfting@...oton.com, openbmc@...ts.ozlabs.org, 
	linux-i2c@...r.kernel.org, linux-kernel@...r.kernel.org, 
	Charles Boyer <Charles.Boyer@...-usa.com>, Vivekanand Veeracholan <vveerach@...gle.com>
Subject: Re: [PATCH v6 4/4] i2c: npcm: Enable slave in eob interrupt

Hi Andy:

Thank you for your feedback.

Andy Shevchenko <andriy.shevchenko@...ux.intel.com> 於 2024年10月11日 週五 下午7:02寫道:
>
> On Fri, Oct 11, 2024 at 01:52:31PM +0800, Tyrone Ting wrote:
> > From: Charles Boyer <Charles.Boyer@...-usa.com>
> >
> > Nuvoton slave enable was in user space API call master_xfer, so it is
> > subject to delays from the OS scheduler. If the BMC is not enabled for
> > slave mode in time for master to send response, then it will NAK the
> > address match. Then the PLDM request timeout occurs.
> >
> > If the slave enable is moved to the EOB interrupt service routine, then
> > the BMC can be ready in slave mode by the time it needs to receive a
> > response.
>
> ...
>
> > +#if IS_ENABLED(CONFIG_I2C_SLAVE)
> > +             /* reenable slave if it was enabled */
> > +             if (bus->slave)
> > +                     iowrite8((bus->slave->addr & 0x7F) | NPCM_I2CADDR_SAEN,
>
> GENMASK()?
> But why do we need it? Do we expect this to be 10-bit address or...?
>

0x7f is going to be removed in the next patch set.

> > +                              bus->reg + NPCM_I2CADDR1);
> > +#endif
>
> --
> With Best Regards,
> Andy Shevchenko
>
>

Thank you.

Regards,
Tyrone

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