linux-kernel - Re: [PATCH 1/1] KVM: nVMX: update VPPR on vmlaunch/vmresume

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Message-ID: <20241014110039.11881-1-mankku@gmail.com>
Date: Mon, 14 Oct 2024 13:57:55 +0300
From: Markku Ahvenjärvi <mankku@...il.com>
To: chao.gao@...el.com
Cc: bp@...en8.de,
	dave.hansen@...ux.intel.com,
	hpa@...or.com,
	janne.karhunen@...il.com,
	kvm@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	mankku@...il.com,
	mingo@...hat.com,
	pbonzini@...hat.com,
	seanjc@...gle.com,
	tglx@...utronix.de,
	x86@...nel.org
Subject: Re: [PATCH 1/1] KVM: nVMX: update VPPR on vmlaunch/vmresume

Hi Chao,

> The issue is that KVM does not properly update vmcs01's SVI. In this case, L1
> does not intercept EOI MSR writes from the deprivileged host (L2), so KVM
> emulates EOI writes by clearing the highest bit in vISR and updating vPPR.
> However, SVI in vmcs01 is not updated, causing it to retain the interrupt vector
> that was just EOI'd. On the next VM-entry to L1, the CPU performs PPR
> virtualization, setting vPPR to SVI & 0xf0, which results in an incorrect vPPR
> 
> Can you try this fix?

I tried, it also fixes the issue.

Thank you Chao, I really appreciate the explanation, it makes sense now.

> diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
> index 4a93ac1b9be9..3d24194a648d 100644
> --- a/arch/x86/include/asm/kvm_host.h
> +++ b/arch/x86/include/asm/kvm_host.h
> @@ -122,6 +122,8 @@
>  #define KVM_REQ_HV_TLB_FLUSH \
>         KVM_ARCH_REQ_FLAGS(32, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
>  #define KVM_REQ_UPDATE_PROTECTED_GUEST_STATE   KVM_ARCH_REQ(34)
> +#define KVM_REQ_UPDATE_HWAPIC_ISR \
> +       KVM_ARCH_REQ_FLAGS(35, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
> 
>  #define CR0_RESERVED_BITS                                               \
>         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
> @@ -764,6 +766,7 @@ struct kvm_vcpu_arch {
>         u64 apic_base;
>         struct kvm_lapic *apic;    /* kernel irqchip context */
>         bool load_eoi_exitmap_pending;
> +       bool update_hwapic_isr;
>         DECLARE_BITMAP(ioapic_handled_vectors, 256);
>         unsigned long apic_attention;
>         int32_t apic_arb_prio;
> diff --git a/arch/x86/kvm/kvm_cache_regs.h b/arch/x86/kvm/kvm_cache_regs.h
> index b1eb46e26b2e..a8dad16161e4 100644
> --- a/arch/x86/kvm/kvm_cache_regs.h
> +++ b/arch/x86/kvm/kvm_cache_regs.h
> @@ -220,6 +220,11 @@ static inline void leave_guest_mode(struct kvm_vcpu *vcpu)
>                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
>         }
> 
> +       if (vcpu->arch.update_hwapic_isr) {
> +               vcpu->arch.update_hwapic_isr = false;
> +               kvm_make_request(KVM_REQ_UPDATE_HWAPIC_ISR, vcpu);
> +       }
> +
>         vcpu->stat.guest_mode = 0;
>  }
> 
> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> index 5bb481aefcbc..d6a03c30f085 100644
> --- a/arch/x86/kvm/lapic.c
> +++ b/arch/x86/kvm/lapic.c
> @@ -800,6 +800,9 @@ static inline void apic_clear_isr(int vec, struct kvm_lapic *apic)
>         if (!__apic_test_and_clear_vector(vec, apic->regs + APIC_ISR))
>                 return;
> 
> +       if (is_guest_mode(apic->vcpu))
> +               apic->vcpu->arch.update_hwapic_isr = true;
> +
>         /*
>          * We do get here for APIC virtualization enabled if the guest
>          * uses the Hyper-V APIC enlightenment.  In this case we may need
> @@ -3068,6 +3071,14 @@ int kvm_apic_set_state(struct kvm_vcpu *vcpu, struct kvm_lapic_state *s)
>         return 0;
>  }
> 
> +void kvm_vcpu_update_hwapic_isr(struct kvm_vcpu *vcpu)
> +{
> +       struct kvm_lapic *apic = vcpu->arch.apic;
> +
> +       if (apic->apicv_active)
> +               kvm_x86_call(hwapic_isr_update)(apic_find_highest_isr(apic));
> +}
> +
>  void __kvm_migrate_apic_timer(struct kvm_vcpu *vcpu)
>  {
>         struct hrtimer *timer;
> diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h
> index 7ef8ae73e82d..ffa0c0e8bda9 100644
> --- a/arch/x86/kvm/lapic.h
> +++ b/arch/x86/kvm/lapic.h
> @@ -266,6 +266,7 @@ void kvm_lapic_expired_hv_timer(struct kvm_vcpu *vcpu);
>  bool kvm_lapic_hv_timer_in_use(struct kvm_vcpu *vcpu);
>  void kvm_lapic_restart_hv_timer(struct kvm_vcpu *vcpu);
>  bool kvm_can_use_hv_timer(struct kvm_vcpu *vcpu);
> +void kvm_vcpu_update_hwapic_isr(struct kvm_vcpu *vcpu);
> 
>  static inline enum lapic_mode kvm_apic_mode(u64 apic_base)
>  {
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 34b52b49f5e6..d90add3fbe99 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -10968,6 +10968,8 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
>  #endif
>                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
>                         kvm_vcpu_update_apicv(vcpu);
> +               if (kvm_check_request(KVM_REQ_UPDATE_HWAPIC_ISR, vcpu))
> +                       kvm_vcpu_update_hwapic_isr(vcpu);
>                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
>                         kvm_check_async_pf_completion(vcpu);
>                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))

Kind regards,
Markku