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Message-ID: <1395bee1-95a7-4d14-a5e8-0e1dc71fadac@amd.com>
Date: Tue, 15 Oct 2024 13:09:42 -0500
From: Mario Limonciello <mario.limonciello@....com>
To: Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>
Cc: Borislav Petkov <bp@...en8.de>, Hans de Goede <hdegoede@...hat.com>,
Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>,
x86@...nel.org, "Gautham R . Shenoy" <gautham.shenoy@....com>,
Perry Yuan <perry.yuan@....com>, linux-kernel@...r.kernel.org,
linux-doc@...r.kernel.org, linux-pm@...r.kernel.org,
platform-driver-x86@...r.kernel.org,
Shyam Sundar S K <Shyam-sundar.S-k@....com>
Subject: Re: [PATCH v2 05/13] platform/x86: hfi: Introduce AMD Hardware
Feedback Interface Driver
On 10/14/2024 22:52, Ricardo Neri wrote:
> On Thu, Oct 10, 2024 at 02:36:57PM -0500, Mario Limonciello wrote:
>> From: Perry Yuan <Perry.Yuan@....com>
>>
>> The AMD Heterogeneous core design and Hardware Feedback Interface (HFI)
>> provide behavioral classification and a dynamically updated ranking table
>> for the scheduler to use when choosing cores for tasks.
>>
>> There are two CPU core types defined: `Classic Core` and `Dense Core`.
>> "Classic" cores are the standard performance cores, while "Dense" cores
>> are optimized for area and efficiency.
>>
>> Heterogeneous compute refers to CPU implementations that are comprised
>> of more than one architectural class, each with two capabilities. This
>> means each CPU reports two separate capabilities: "perf" and "eff".
>>
>> Each capability lists all core ranking numbers between 0 and 255, where
>> a higher number represents a higher capability.
>>
>> Heterogeneous systems can also extend to more than two architectural
>> classes.
>>
>> The purpose of the scheduling feedback mechanism is to provide information
>> to the operating system scheduler in real time, allowing the scheduler to
>> direct threads to the optimal core during task scheduling.
>>
>> All core ranking data are provided by the BIOS via a shared memory ranking
>> table, which the driver reads and uses to update core capabilities to the
>> scheduler. When the hardware updates the table, it generates a platform
>> interrupt to notify the OS to read the new ranking table.
>>
>> Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
>
> I tried to find the HFI details on the documents in this "bug" but I could
> not find them. What document in specific could I look at?
>
> Thanks and BR,
> Ricardo
Hi Ricardo,
It is spread out across multiple places. This is part of the reason for
patch 1 in the series outlines details of how it works.
The reason for that "collect all" Bugzilla for documentation is because
the URLs for AMD documentation have undergone changes in the past and it
makes it difficult to put stable URLs in commit messages. So teams that
want to reference documentation put it on a dump all bug for a stable
URL to reference.
On that link you will find the APM, which will have some documentation
specifically for the CPUID leafs used for topology identification and
clearing history.
Read patch 1 and let me know if it covers what specifically you're
looking for. If it's still missing some info let me know what you would
like added.
Also; I do want to note something; this is the first series to lay some
foundation for static information and not everything in patch 1 is
implemented in this first series. There will be further follow-ups later.
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