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Message-Id: <172901867521.2735310.14333146229393737694.b4-ty@arm.com>
Date: Tue, 15 Oct 2024 19:58:53 +0100
From: Catalin Marinas <catalin.marinas@....com>
To: will@...nel.org,
ast@...nel.org,
puranjay@...nel.org,
andrii@...nel.org,
mark.rutland@....com,
Liao Chang <liaochang1@...wei.com>
Cc: linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org,
linux-trace-kernel@...r.kernel.org,
bpf@...r.kernel.org
Subject: Re: [PATCH v2] arm64: insn: Simulate nop instruction for better uprobe performance
On Mon, 09 Sep 2024 07:11:14 +0000, Liao Chang wrote:
> v2->v1:
> 1. Remove the simuation of STP and the related bits.
> 2. Use arm64_skip_faulting_instruction for single-stepping or FEAT_BTI
> scenario.
>
> As Andrii pointed out, the uprobe/uretprobe selftest bench run into a
> counterintuitive result that nop and push variants are much slower than
> ret variant [0]. The root cause lies in the arch_probe_analyse_insn(),
> which excludes 'nop' and 'stp' from the emulatable instructions list.
> This force the kernel returns to userspace and execute them out-of-line,
> then trapping back to kernel for running uprobe callback functions. This
> leads to a significant performance overhead compared to 'ret' variant,
> which is already emulated.
>
> [...]
Applied to arm64 (for-next/probes), thanks! I fixed it up according to
Mark's comments.
[1/1] arm64: insn: Simulate nop instruction for better uprobe performance
https://git.kernel.org/arm64/c/ac4ad5c09b34
--
Catalin
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