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Message-Id: <1728977644-8207-1-git-send-email-hongxing.zhu@nxp.com>
Date: Tue, 15 Oct 2024 15:34:02 +0800
From: Richard Zhu <hongxing.zhu@....com>
To: robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
abelvesa@...nel.org,
peng.fan@....com,
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Cc: hongxing.zhu@....com,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
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Subject: [PATCH v5 0/2] Add one clock gate for i.MX95 HSIO block
REF_EN (Bit6) of LFAST_IO_REG control i.MX95 PCIe REF clock out
enable/disable.
Add one clock gate for i.MX95 HSIO block to support PCIe REF clock
out gate.
v5 changes:
- Rebase to v6.12-rc3.
v4 changes:
- Correct typo in commit message of #2 patch.
v3 changes:
- Squash first two dt-binding patches into one.
- Add Krzysztof's Acked-by tag, and Frank's Reviewed-by tag.
v2 changes:
- Correct the compatible entries by alphabetical order
- Include all necessary To/Cc entried reminderd by Krzysztof.
Thanks.
[PATCH v5 1/2] dt-bindings: clock: nxp,imx95-blk-ctl: Add compatible
[PATCH v5 2/2] clk: imx95-blk-ctl: Add one clock gate for HSIO block
Documentation/devicetree/bindings/clock/nxp,imx95-blk-ctl.yaml | 5 +++--
drivers/clk/imx/clk-imx95-blk-ctl.c | 20 ++++++++++++++++++++
2 files changed, 23 insertions(+), 2 deletions(-)
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