lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <1728981213-8771-1-git-send-email-hongxing.zhu@nxp.com>
Date: Tue, 15 Oct 2024 16:33:24 +0800
From: Richard Zhu <hongxing.zhu@....com>
To: kw@...ux.com,
	manivannan.sadhasivam@...aro.org,
	bhelgaas@...gle.com,
	lpieralisi@...nel.org,
	frank.li@....com,
	l.stach@...gutronix.de,
	robh+dt@...nel.org,
	conor+dt@...nel.org,
	shawnguo@...nel.org,
	krzysztof.kozlowski+dt@...aro.org,
	festevam@...il.com,
	s.hauer@...gutronix.de
Cc: hongxing.zhu@....com,
	linux-pci@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	devicetree@...r.kernel.org,
	kernel@...gutronix.de,
	imx@...ts.linux.dev
Subject: [PATCH v4 0/9] A bunch of changes to refine i.MX PCIe driver

A bunch of changes to refine i.MX PCIe driver.
- Add ref clock gate for i.MX95 PCIe by #1, #2 and #9 patches.
  The changes of clock part are here [1].
  [1] https://lkml.org/lkml/2024/10/15/390
- #3 and #4 patches clean i.MX PCIe driver by removing useless codes.
  Patch #3 depends on dts changes. And the dts changes had been applied
  by Shawn, there is no dependecy now.
- Make core reset and enable_ref_clk symmetric for i.MX PCIe driver by
  #5 and #6 patches.
- Use dwc common suspend resume method, and enable i.MX8MQ, i.MX8Q and
  i.MX95 PCIe PM supports by #7 and #8 patches.

v4 changes:
It's my fault that I missing Manivanna in the reviewer list.
I'm sorry about that.
- Rebase to v6.12-rc3, and resolve the dtsi conflictions.
  Add Manivanna into reviewer list.

v3 changes:
- Update EP binding refer to comments provided by Krzysztof Kozlowski.
  Thanks.

v2 changes:
- Add the reasons why one more clock is added for i.MX95 PCIe in patch #1.
- Add the "Reviewed-by: Frank Li <Frank.Li@....com>" into patch #2, #4, #5,
  #6, #8 and #9.

[PATCH v4 1/9] dt-bindings: imx6q-pcie: Add ref clock for i.MX95 PCIe
[PATCH v4 2/9] PCI: imx6: Add ref clock for i.MX95 PCIe
[PATCH v4 3/9] PCI: imx6: Fetch dbi2 and iATU base addesses from DT
[PATCH v4 4/9] PCI: imx6: Correct controller_id generation logic for
[PATCH v4 5/9] PCI: imx6: Make core reset assertion deassertion
[PATCH v4 6/9] PCI: imx6: Make *_enable_ref_clk() function symmetric
[PATCH v4 7/9] PCI: imx6: Use dwc common suspend resume method
[PATCH v4 8/9] PCI: imx6: Add i.MX8MQ i.MX8Q and i.MX95 PCIe PM
[PATCH v4 9/9] arm64: dts: imx95: Add ref clock for i.MX95 PCIe

Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml |   4 +-
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml     |   1 +
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml        |  25 ++++++++++--
arch/arm64/boot/dts/freescale/imx95.dtsi                         |  18 +++++++--
drivers/pci/controller/dwc/pci-imx6.c                            | 166 +++++++++++++++++++++++++++-------------------------------------------------
5 files changed, 97 insertions(+), 117 deletions(-)


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ