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Message-Id: <1728981213-8771-3-git-send-email-hongxing.zhu@nxp.com>
Date: Tue, 15 Oct 2024 16:33:26 +0800
From: Richard Zhu <hongxing.zhu@....com>
To: kw@...ux.com,
	manivannan.sadhasivam@...aro.org,
	bhelgaas@...gle.com,
	lpieralisi@...nel.org,
	frank.li@....com,
	l.stach@...gutronix.de,
	robh+dt@...nel.org,
	conor+dt@...nel.org,
	shawnguo@...nel.org,
	krzysztof.kozlowski+dt@...aro.org,
	festevam@...il.com,
	s.hauer@...gutronix.de
Cc: hongxing.zhu@....com,
	linux-pci@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	devicetree@...r.kernel.org,
	kernel@...gutronix.de,
	imx@...ts.linux.dev
Subject: [PATCH v4 2/9] PCI: imx6: Add ref clock for i.MX95 PCIe

Add "ref" clock to enable reference clock.

If use external clock, ref clock should point to external reference.

If use internal clock, CREF_EN in LAST_TO_REG controls reference output,
which implement in drivers/clk/imx/clk-imx95-blk-ctl.c.

Signed-off-by: Richard Zhu <hongxing.zhu@....com>
Reviewed-by: Frank Li <Frank.Li@....com>
---
 drivers/pci/controller/dwc/pci-imx6.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 808d1f105417..52a8b2dc828a 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -1480,6 +1480,7 @@ static const char * const imx8mm_clks[] = {"pcie_bus", "pcie", "pcie_aux"};
 static const char * const imx8mq_clks[] = {"pcie_bus", "pcie", "pcie_phy", "pcie_aux"};
 static const char * const imx6sx_clks[] = {"pcie_bus", "pcie", "pcie_phy", "pcie_inbound_axi"};
 static const char * const imx8q_clks[] = {"mstr", "slv", "dbi"};
+static const char * const imx95_clks[] = {"pcie_bus", "pcie", "pcie_phy", "pcie_aux", "ref"};
 
 static const struct imx_pcie_drvdata drvdata[] = {
 	[IMX6Q] = {
@@ -1593,8 +1594,8 @@ static const struct imx_pcie_drvdata drvdata[] = {
 	[IMX95] = {
 		.variant = IMX95,
 		.flags = IMX_PCIE_FLAG_HAS_SERDES,
-		.clk_names = imx8mq_clks,
-		.clks_cnt = ARRAY_SIZE(imx8mq_clks),
+		.clk_names = imx95_clks,
+		.clks_cnt = ARRAY_SIZE(imx95_clks),
 		.ltssm_off = IMX95_PE0_GEN_CTRL_3,
 		.ltssm_mask = IMX95_PCIE_LTSSM_EN,
 		.mode_off[0]  = IMX95_PE0_GEN_CTRL_1,
-- 
2.37.1


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