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Message-Id: <20241016123036.21366-7-qiuxu.zhuo@intel.com>
Date: Wed, 16 Oct 2024 20:30:32 +0800
From: Qiuxu Zhuo <qiuxu.zhuo@...el.com>
To: tony.luck@...el.com,
bp@...en8.de
Cc: tglx@...utronix.de,
dave.hansen@...ux.intel.com,
mingo@...hat.com,
hpa@...or.com,
x86@...nel.org,
linux-edac@...r.kernel.org,
linux-kernel@...r.kernel.org,
qiuxu.zhuo@...el.com
Subject: [PATCH v2 06/10] x86/mce: Convert multiple if () statements into a switch() statement
Convert the multiple if() statements used for vendor differentiation
into a switch() statement for better readability.
As a bonus, the size of new generated text is reduced by 16 bytes.
$ size core.o.*
text data bss dec hex filename
21364 4181 3776 29321 7289 core.o.old
21348 4181 3776 29305 7279 core.o.new
No functional changes intended.
Reviewed-by: Tony Luck <tony.luck@...el.com>
Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@...el.com>
---
arch/x86/kernel/cpu/mce/core.c | 14 +++++++++-----
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
index 725c1d6fb1e5..40672fe0991a 100644
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -1892,7 +1892,8 @@ static int __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
}
/* This should be disabled by the BIOS, but isn't always */
- if (c->x86_vendor == X86_VENDOR_AMD) {
+ switch (c->x86_vendor) {
+ case X86_VENDOR_AMD:
if (c->x86 == 15 && this_cpu_read(mce_num_banks) > 4) {
/*
* disable GART TBL walk error reporting, which
@@ -1925,9 +1926,9 @@ static int __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
if (c->x86 >= 0x17 && c->x86 <= 0x1A)
mce_flags.zen_ifu_quirk = 1;
- }
+ break;
- if (c->x86_vendor == X86_VENDOR_INTEL) {
+ case X86_VENDOR_INTEL:
/*
* SDM documents that on family 6 bank 0 should not be written
* because it aliases to another special BIOS controlled
@@ -1964,9 +1965,10 @@ static int __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
*/
if (c->x86_vfm == INTEL_SKYLAKE_X)
mce_flags.skx_repmov_quirk = 1;
- }
- if (c->x86_vendor == X86_VENDOR_ZHAOXIN) {
+ break;
+
+ case X86_VENDOR_ZHAOXIN:
/*
* All newer Zhaoxin CPUs support MCE broadcasting. Enable
* synchronization with a one second timeout.
@@ -1975,6 +1977,8 @@ static int __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
if (cfg->monarch_timeout < 0)
cfg->monarch_timeout = USEC_PER_SEC;
}
+
+ break;
}
if (cfg->monarch_timeout < 0)
--
2.17.1
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