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Message-ID: <20241016132104.GK3559746@nvidia.com>
Date: Wed, 16 Oct 2024 10:21:04 -0300
From: Jason Gunthorpe <jgg@...dia.com>
To: Suravee Suthikulpanit <suravee.suthikulpanit@....com>
Cc: linux-kernel@...r.kernel.org, iommu@...ts.linux.dev, joro@...tes.org,
robin.murphy@....com, vasant.hegde@....com, kevin.tian@...el.com,
jon.grimm@....com, santosh.shukla@....com, pandoh@...gle.com,
kumaranand@...gle.com
Subject: Re: [PATCH v6 4/9] iommu/amd: Introduce per-device DTE cache to
store persistent bits
On Wed, Oct 16, 2024 at 05:17:51AM +0000, Suravee Suthikulpanit wrote:
> diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
> index f537b264f118..3f53d3bc79cb 100644
> --- a/drivers/iommu/amd/amd_iommu_types.h
> +++ b/drivers/iommu/amd/amd_iommu_types.h
> @@ -830,6 +830,16 @@ struct devid_map {
> /* Device may request super-user privileges */
> #define AMD_IOMMU_DEVICE_FLAG_PRIV_SUP 0x10
>
> +/*
> + * Structure defining one entry in the device table
> + */
> +struct dev_table_entry {
> + union {
> + u64 data[4];
> + u128 data128[2];
> + };
> +};
It would be appropriate to put this hunk into the prior patch so your
series does not move code it just added..
> /*
> * This struct contains device specific data for the IOMMU
> */
> @@ -858,6 +868,7 @@ struct iommu_dev_data {
> bool defer_attach;
>
> struct ratelimit_state rs; /* Ratelimit IOPF messages */
> + struct dev_table_entry dte_cache;
> };
I would call this initial_dte or something, it isn't a cache, it is
the recoding of the ACPI data into a DTE format.
/* Stores INIT/EINT,NMIm SYSMGTx,LINTx values from ACPI */
struct dev_tabl_entry initial_dte;
> @@ -1159,19 +1171,19 @@ static void __init set_dev_entry_from_acpi(struct amd_iommu *iommu,
> u16 devid, u32 flags, u32 ext_flags)
> {
> if (flags & ACPI_DEVFLAG_INITPASS)
> - set_dev_entry_bit(iommu, devid, DEV_ENTRY_INIT_PASS);
> + set_dte_cache_bit(iommu, devid, DEV_ENTRY_INIT_PASS);
> if (flags & ACPI_DEVFLAG_EXTINT)
> - set_dev_entry_bit(iommu, devid, DEV_ENTRY_EINT_PASS);
> + set_dte_cache_bit(iommu, devid, DEV_ENTRY_EINT_PASS);
> if (flags & ACPI_DEVFLAG_NMI)
> - set_dev_entry_bit(iommu, devid, DEV_ENTRY_NMI_PASS);
> + set_dte_cache_bit(iommu, devid, DEV_ENTRY_NMI_PASS);
> if (flags & ACPI_DEVFLAG_SYSMGT1)
> - set_dev_entry_bit(iommu, devid, DEV_ENTRY_SYSMGT1);
> + set_dte_cache_bit(iommu, devid, DEV_ENTRY_SYSMGT1);
> if (flags & ACPI_DEVFLAG_SYSMGT2)
> - set_dev_entry_bit(iommu, devid, DEV_ENTRY_SYSMGT2);
> + set_dte_cache_bit(iommu, devid, DEV_ENTRY_SYSMGT2);
> if (flags & ACPI_DEVFLAG_LINT0)
> - set_dev_entry_bit(iommu, devid, DEV_ENTRY_LINT0_PASS);
> + set_dte_cache_bit(iommu, devid, DEV_ENTRY_LINT0_PASS);
> if (flags & ACPI_DEVFLAG_LINT1)
> - set_dev_entry_bit(iommu, devid, DEV_ENTRY_LINT1_PASS);
> + set_dte_cache_bit(iommu, devid, DEV_ENTRY_LINT1_PASS);
Doesn't this break the driver at this patch? Nothing reads from the
dte_cache at this point in the series so the real DTE never got these
bits?
Maybe just add a temporary line here to copy the entire dte_cache to
the real dte? The next patch fixes it I think?
But I like the idea, I think this is the a much more understandable
direction to go.
Jason
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