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Message-ID: <172909273712.703216.9083554221438336956.b4-ty@kernel.org>
Date: Wed, 16 Oct 2024 10:32:16 -0500
From: Bjorn Andersson <andersson@...nel.org>
To: Konrad Dybcio <konradybcio@...nel.org>,
Johan Hovold <johan+linaro@...nel.org>
Cc: Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Abel Vesa <abel.vesa@...aro.org>,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] arm64: dts: qcom: x1e80100: enable GICv3 ITS for PCIe
On Wed, 09 Oct 2024 18:17:15 +0200, Johan Hovold wrote:
> The DWC PCIe controller can be used with its internal MSI controller or
> with an external one such as the GICv3 Interrupt Translation Service
> (ITS).
>
> Add the msi-map properties needed to use the GIC ITS. This will also
> make Linux switch to the ITS implementation, which allows for assigning
> affinity to individual MSIs. This specifically allows NVMe and Wi-Fi
> interrupts to be processed on all cores (and not just on CPU0).
>
> [...]
Applied, thanks!
[1/1] arm64: dts: qcom: x1e80100: enable GICv3 ITS for PCIe
commit: 9c4cd0aef259d41355f90e0dbb2d3574f3830de9
Best regards,
--
Bjorn Andersson <andersson@...nel.org>
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