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Message-ID: <20241016171157.00004898@Huawei.com>
Date: Wed, 16 Oct 2024 17:11:57 +0100
From: Jonathan Cameron <Jonathan.Cameron@...wei.com>
To: Terry Bowman <terry.bowman@....com>
CC: <ming4.li@...el.com>, <linux-cxl@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>, <linux-pci@...r.kernel.org>,
	<dave@...olabs.net>, <dave.jiang@...el.com>, <alison.schofield@...el.com>,
	<vishal.l.verma@...el.com>, <dan.j.williams@...el.com>,
	<bhelgaas@...gle.com>, <mahesh@...ux.ibm.com>, <oohall@...il.com>,
	<Benjamin.Cheatham@....com>, <rrichter@....com>, <nathan.fontenot@....com>,
	<smita.koralahallichannabasappa@....com>
Subject: Re: [PATCH 02/15] cxl/aer/pci: Update is_internal_error() to be
 callable w/o CONFIG_PCIEAER_CXL

On Tue, 8 Oct 2024 17:16:44 -0500
Terry Bowman <terry.bowman@....com> wrote:

> CXL port error handling will be updated in future and will use
> logic to determine if an error requires CXL or PCIe processing.
> Internal errors are one indicator to identify an error is a CXL
> protocol error.
> 
> is_internal_error() is currently limited by CONFIG_PCIEAER_CXL
> kernel config.
> 
> Update the is_internal_error() function's declaration such that it is
> always available regardless if CONFIG_PCIEAER_CXL kernel config
> is enabled or disabled.
> 
> Signed-off-by: Terry Bowman <terry.bowman@....com>
Given this has nothing specifically to do with CXL, this seems
sensible to me.

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@...wei.com>

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