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Message-ID: <67bf12d3-db22-4344-aaa3-9e40c7a0ea52@huawei.com>
Date: Wed, 16 Oct 2024 19:37:05 +0800
From: Jijie Shao <shaojijie@...wei.com>
To: Jakub Kicinski <kuba@...nel.org>
CC: <shaojijie@...wei.com>, <davem@...emloft.net>, <edumazet@...gle.com>,
	<pabeni@...hat.com>, <shenjian15@...wei.com>, <salil.mehta@...wei.com>,
	<liuyonglong@...wei.com>, <wangpeiyang1@...wei.com>, <lanhao@...wei.com>,
	<chenhao418@...wei.com>, <netdev@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH net 1/9] net: hns3: default enable tx bounce buffer when
 smmu enabled


on 2024/10/16 9:16, Jakub Kicinski wrote:
> On Fri, 11 Oct 2024 17:45:13 +0800 Jijie Shao wrote:
>> From: Peiyang Wang <wangpeiyang1@...wei.com>
>>
>> When TX bounce buffer is enabled, dma map is used only when the buffer
>> initialized. When spending packages, the driver only do dma sync. To
> packages -> packets
>
>> avoid SMMU prefetch, default enable tx bounce buffer if smmu enabled.
> you seem to force it to be enabled, rather than just changing
> the default. That is strange. Why not let the user lower the value?
>
> Also I don't see why this is a fix. Seems like a performance
> improvement.

The SMMU engine on HIP09 chip has a hardware issue. SMMU pagetable 
prefetch features may prefetch and use a invalid PTE even the PTE is 
valid at that time. This will cause the device trigger fake pagefaults. 
The solution is to avoid prefetching by adding a SYNC command when smmu 
mapping a iova. But the performance of nic has a sharp drop. Then we do 
this workaround, always enable tx bounce buffer, avoid mapping/unmapping 
on TX path. This issue only affects HNS3, so we always enable tx bounce 
buffer to improve performance. Thanks, Jijie Shao


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