linux-kernel - Re: FW: [RFC PATCH v2 1/1] mmc: sdhci-pci-gli: fix x86/S0ix SoCs suspend for GL9767

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Message-ID: <CAK00qKCdKsdWbJ7DQRQX3RjSsd31PkinAUXt9fYtG+crx3G0Rg@mail.gmail.com>
Date: Thu, 17 Oct 2024 23:05:14 +0800
From: Victor Shih <victorshihgli@...il.com>
To: ggo@...edocomputers.com
Cc: Ulf Hansson <ulf.hansson@...aro.org>, Adrian Hunter <adrian.hunter@...el.com>, 
	linux-kernel@...r.kernel.org, linux-mmc@...r.kernel.org, 
	Greg.tu@...esyslogic.com.tw, HL.Liu@...esyslogic.com.tw, 
	Ben Chuang <ben.chuang@...esyslogic.com.tw>, Ben Chuang <benchuanggli@...il.com>, 
	Lucas.Lai@...esyslogic.com.tw, 
	VictorShih[施勝文] <victor.shih@...esyslogic.com.tw>, 
	cs@...edo.de
Subject: Re: FW: [RFC PATCH v2 1/1] mmc: sdhci-pci-gli: fix x86/S0ix SoCs
 suspend for GL9767

Hi, Georg

I noticed that you mentioned in the patch for version 1 that the AMD
platform is fine,
may I ask that are AMD platforms and Intel platforms using the same
kernel version?
If they are using the same kernel version, how do you confirm that
the solution is to modify the kernel code?

Thanks, Victor Shih

> -----Original Message-----
> From: Georg Gottleuber <ggo@...edocomputers.com>
> Sent: Thursday, October 17, 2024 4:11 PM
> To: Ben Chuang <benchuanggli@...il.com>
> Cc: Ben Chuang <benchuanggli@...il.com>; adrian.hunter@...el.com; Ulf Hansson <ulf.hansson@...aro.org>; VictorShih[施勝文] <Victor.Shih@...esyslogic.com.tw>; LucasLai[賴宗清] <Lucas.Lai@...esyslogic.com.tw>; GregTu[杜啟軒] <Greg.Tu@...esyslogic.com.tw>; HLLiu[劉鴻霖] <HL.Liu@...esyslogic.com.tw>; cs@...edo.de; Georg Gottleuber <ggo@...edocomputers.com>; BenChuang[莊智量] <Ben.Chuang@...esyslogic.com.tw>; linux-mmc@...r.kernel.org; linux-kernel@...r.kernel.org
> Subject: [RFC PATCH v2 1/1] mmc: sdhci-pci-gli: fix x86/S0ix SoCs suspend for GL9767
>
> [Some people who received this message don't often get email from ggo@...edocomputers.com. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
>
> Adapt commit 1202d617e3d04c ("mmc: sdhci-pci-gli: fix LPM negotiation so x86/S0ix SoCs can suspend") also for GL9767 card reader.
>
> This patch was written without specs or deeper knowledge of PCI sleep states. Tests show that S0ix is reached and lower power consumption when suspended (6 watts vs 1.2 watts for TUXEDO InfinityBook Pro Gen9 Intel).
>
> The function of the card reader appears to be OK.
>
> Link: https://bugzilla.kernel.org/show_bug.cgi?id=219284
> Fixes: f3a5b56c1286 ("mmc: sdhci-pci-gli: Add Genesys Logic GL9767 support")
> Co-developed-by: Christoffer Sandberg <cs@...edo.de>
> Signed-off-by: Christoffer Sandberg <cs@...edo.de>
> Signed-off-by: Georg Gottleuber <ggo@...edocomputers.com>
> ---
> v1 -> v2:
> - use gl9767_vhs_read() and gl9767_vhs_write()
> - editorial changes to the commit message
>
>  drivers/mmc/host/sdhci-pci-gli.c | 61 +++++++++++++++++++++++++++++++-
>  1 file changed, 60 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/sdhci-pci-gli.c
> b/drivers/mmc/host/sdhci-pci-gli.c
> index 0f81586a19df..bdccd74bacd2 100644
> --- a/drivers/mmc/host/sdhci-pci-gli.c
> +++ b/drivers/mmc/host/sdhci-pci-gli.c
> @@ -1205,6 +1205,28 @@ static void
> gl9763e_set_low_power_negotiation(struct sdhci_pci_slot *slot,
>         pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value);  }
>
> +static void gl9767_set_low_power_negotiation(struct sdhci_pci_slot *slot,
> +                                            bool enable) {
> +       struct pci_dev *pdev = slot->chip->pdev;
> +       u32 value;
> +
> +       gl9767_vhs_write(pdev);
> +
> +       pci_write_config_dword(pdev, PCIE_GLI_9767_VHS, value);
> +
> +       pci_read_config_dword(pdev, PCIE_GLI_9767_CFG, &value);
> +
> +       if (enable)
> +               value &= ~PCIE_GLI_9767_CFG_LOW_PWR_OFF;
> +       else
> +               value |= PCIE_GLI_9767_CFG_LOW_PWR_OFF;
> +
> +       pci_write_config_dword(pdev, PCIE_GLI_9767_CFG, value);
> +
> +       gl9767_vhs_read(pdev);
> +}
> +
>  static void sdhci_set_gl9763e_signaling(struct sdhci_host *host,
>                                         unsigned int timing)  { @@ -1470,6 +1492,42 @@ static int gl9763e_suspend(struct sdhci_pci_chip
> *chip)
>         gl9763e_set_low_power_negotiation(slot, false);
>         return ret;
>  }
> +
> +static int gl9767_resume(struct sdhci_pci_chip *chip) {
> +       struct sdhci_pci_slot *slot = chip->slots[0];
> +       int ret;
> +
> +       ret = sdhci_pci_gli_resume(chip);
> +       if (ret)
> +               return ret;
> +
> +       gl9767_set_low_power_negotiation(slot, false);
> +
> +       return 0;
> +}
> +
> +static int gl9767_suspend(struct sdhci_pci_chip *chip) {
> +       struct sdhci_pci_slot *slot = chip->slots[0];
> +       int ret;
> +
> +       /*
> +        * Certain SoCs can suspend only with the bus in low-
> +        * power state, notably x86 SoCs when using S0ix.
> +        * Re-enable LPM negotiation to allow entering L1 state
> +        * and entering system suspend.
> +        */
> +       gl9767_set_low_power_negotiation(slot, true);
> +
> +       ret = sdhci_suspend_host(slot->host);
> +       if (ret) {
> +               gl9767_set_low_power_negotiation(slot, false);
> +               return ret;
> +       }
> +
> +       return 0;
> +}
>  #endif
>
>  static int gli_probe_slot_gl9763e(struct sdhci_pci_slot *slot) @@ -1605,6 +1663,7 @@ const struct sdhci_pci_fixes sdhci_gl9767 = {
>         .probe_slot     = gli_probe_slot_gl9767,
>         .ops            = &sdhci_gl9767_ops,
>  #ifdef CONFIG_PM_SLEEP
> -       .resume         = sdhci_pci_gli_resume,
> +       .resume         = gl9767_resume,
> +       .suspend        = gl9767_suspend,
>  #endif
>  };
> --
> 2.34.1
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