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Message-ID: <ZxEwVShJuMH4J1Hp@x1>
Date: Thu, 17 Oct 2024 11:42:13 -0400
From: Brian Masney <bmasney@...hat.com>
To: Jagadeesh Kona <quic_jkona@...cinc.com>
Cc: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Ajit Pandey <quic_ajipan@...cinc.com>,
Imran Shaik <quic_imrashai@...cinc.com>,
Taniya Das <quic_tdas@...cinc.com>,
Satya Priya Kakitapalli <quic_skakitap@...cinc.com>,
Shivnandan Kumar <quic_kshivnan@...cinc.com>
Subject: Re: [PATCH 2/3] arm64: dts: qcom: sa8775p: Add CPU OPP tables to
scale DDR/L3
On Thu, Oct 17, 2024 at 02:58:31PM +0530, Jagadeesh Kona wrote:
> + cpu0_opp_table: opp-table-cpu0 {
> + compatible = "operating-points-v2";
> + opp-shared;
> +
> + cpu0_opp_1267mhz: opp-1267200000 {
> + opp-hz = /bits/ 64 <1267200000>;
> + opp-peak-kBps = <6220800 29491200>;
> + };
> +
> + cpu0_opp_1363mhz: opp-1363200000 {
> + opp-hz = /bits/ 64 <1363200000>;
> + opp-peak-kBps = <6220800 29491200>;
> + };
[snip]
> + cpu4_opp_table: opp-table-cpu4 {
> + compatible = "operating-points-v2";
> + opp-shared;
> +
> + cpu4_opp_1267mhz: opp-1267200000 {
> + opp-hz = /bits/ 64 <1267200000>;
> + opp-peak-kBps = <6220800 29491200>;
> + };
> +
> + cpu4_opp_1363mhz: opp-1363200000 {
> + opp-hz = /bits/ 64 <1363200000>;
> + opp-peak-kBps = <6220800 29491200>;
> + };
There's no functional differences in the cpu0 and cpu4 opp tables. Can
a single table be used?
This aligns with my recollection that this particular SoC only has the
gold cores.
Brian
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