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Message-ID: <18b311f580dfd0640db076d066ba5286.sboyd@kernel.org> Date: Thu, 17 Oct 2024 12:30:09 -0700 From: Stephen Boyd <sboyd@...nel.org> To: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>, Bartosz Golaszewski <brgl@...ev.pl>, Conor Dooley <conor+dt@...nel.org>, Daniel Golle <daniel@...rotopia.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Matthias Brugger <matthias.bgg@...il.com>, Michael Turquette <mturquette@...libre.com>, Philipp Zabel <p.zabel@...gutronix.de>, Rob Herring <robh@...nel.org>, Sam Shih <sam.shih@...iatek.com>, Yassine Oudjana <yassine.oudjana@...il.com> Cc: Uwe Kleine-König <u.kleine-koenig@...libre.com>, Yassine Oudjana <y.oudjana@...tonmail.com>, Yassine Oudjana <yassine.oudjana@...il.com>, linux-clk@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, linux-mediatek@...ts.infradead.org, linux-arm-kernel@...ts.infradead.org Subject: Re: [PATCH v7 2/2] clk: mediatek: Add drivers for MediaTek MT6735 main clock and reset drivers Quoting Yassine Oudjana (2024-10-17 00:17:06) > From: Yassine Oudjana <y.oudjana@...tonmail.com> > > Add drivers for MT6735 apmixedsys, topckgen, infracfg and pericfg > clock and reset controllers. These provide the base clocks and resets > on the platform, enough to bring up all essential blocks including > PWRAP, MSDC and peripherals (UART, I2C, SPI). > > Signed-off-by: Yassine Oudjana <y.oudjana@...tonmail.com> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com> > --- Applied to clk-next
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