linux-kernel - [PATCH 0/3] Add support to scale DDR and L3 on SA8775P

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Message-ID: <20241017-sa8775p-cpufreq-l3-ddr-scaling-v1-0-074e0fb80b33@quicinc.com>
Date: Thu, 17 Oct 2024 14:58:29 +0530
From: Jagadeesh Kona <quic_jkona@...cinc.com>
To: Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio
	<konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski
	<krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>
CC: <linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, Ajit Pandey <quic_ajipan@...cinc.com>,
        "Imran
 Shaik" <quic_imrashai@...cinc.com>,
        Taniya Das <quic_tdas@...cinc.com>,
        "Satya Priya Kakitapalli" <quic_skakitap@...cinc.com>,
        Jagadeesh Kona
	<quic_jkona@...cinc.com>,
        Shivnandan Kumar <quic_kshivnan@...cinc.com>
Subject: [PATCH 0/3] Add support to scale DDR and L3 on SA8775P

Add support to scale DDR and L3 based on CPU frequencies
on Qualcomm SA8775P platform. Also add support for LMH
interrupts to indicate if there is any thermal throttle.

The changes in this series are dependent on below series changes:
https://lore.kernel.org/linux-arm-msm/20240904171209.29120-1-quic_rlaggysh@quicinc.com/#t

Signed-off-by: Jagadeesh Kona <quic_jkona@...cinc.com>
---
Jagadeesh Kona (2):
      arm64: dts: qcom: sa8775p: Add support to scale DDR/L3
      arm64: dts: qcom: sa8775p: Add LMH interrupts support

Shivnandan Kumar (1):
      arm64: dts: qcom: sa8775p: Add CPU OPP tables to scale DDR/L3

 arch/arm64/boot/dts/qcom/sa8775p.dtsi | 215 ++++++++++++++++++++++++++++++++++
 1 file changed, 215 insertions(+)
---
base-commit: d1ef2d48e83b32417eb55480c097737364535405
change-id: 20241017-sa8775p-cpufreq-l3-ddr-scaling-a1a9abce98c6

Best regards,
-- 
Jagadeesh Kona <quic_jkona@...cinc.com>