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Message-ID: <20241017120859.00004713@Huawei.com>
Date: Thu, 17 Oct 2024 12:08:59 +0100
From: Jonathan Cameron <Jonathan.Cameron@...wei.com>
To: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
CC: <linux-pci@...r.kernel.org>, Bjorn Helgaas <bhelgaas@...gle.com>, "Lorenzo
Pieralisi" <lorenzo.pieralisi@....com>, Rob Herring <robh@...nel.org>,
Krzysztof Wilczyński <kw@...ux.com>, "Maciej W. Rozycki"
<macro@...am.me.uk>, Lukas Wunner <lukas@...ner.de>, Alexandru Gagniuc
<mr.nuke.me@...il.com>, Krishna chaitanya chundru <quic_krichai@...cinc.com>,
Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>, "Rafael J.
Wysocki" <rafael@...nel.org>, <linux-pm@...r.kernel.org>, Smita Koralahalli
<Smita.KoralahalliChannabasappa@....com>, Shuah Khan <shuah@...nel.org>,
<linux-kernel@...r.kernel.org>, <linux-kselftest@...r.kernel.org>, "Daniel
Lezcano" <daniel.lezcano@...aro.org>, Amit Kucheria <amitk@...nel.org>, Zhang
Rui <rui.zhang@...el.com>, Christophe JAILLET <christophe.jaillet@...adoo.fr>
Subject: Re: [PATCH v8 8/8] selftests/pcie_bwctrl: Create selftests
On Wed, 9 Oct 2024 12:52:23 +0300
Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com> wrote:
> Create selftests for PCIe BW control through the PCIe cooling device
> sysfs interface.
>
> First, the BW control selftest finds the PCIe Port to test with. By
> default, the PCIe Port with the highest Link Speed is selected but
> another PCIe Port can be provided with -d parameter.
>
> The actual test steps the cur_state of the cooling device one-by-one
> from max_state to what the cur_state was initially. The speed change
> is confirmed by observing the current_link_speed for the corresponding
> PCIe Port.
>
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
My bash is terrible, but as far as I can tell this looks reasonable.
So with that in mind take this with a pinch of salt.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@...wei.com>
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