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Message-ID: <20241017114055.13971-1-quic_uaggarwa@quicinc.com>
Date: Thu, 17 Oct 2024 17:10:53 +0530
From: Uttkarsh Aggarwal <quic_uaggarwa@...cinc.com>
To: Krzysztof Kozlowski <krzk+dt@...nel.org>, Rob Herring <robh@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Greg Kroah-Hartman
	<gregkh@...uxfoundation.org>,
        Felipe Balbi <balbi@...nel.org>,
        Thinh Nguyen
	<Thinh.Nguyen@...opsys.com>
CC: <linux-usb@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <quic_ppratap@...cinc.com>,
        <quic_jackp@...cinc.com>,
        Uttkarsh Aggarwal <quic_uaggarwa@...cinc.com>
Subject: [PATCH v2 0/2] Add support to ignore single SE0 glitches

Currently in few of Qualcomm chips USB (Low speed) mouse not
detected showing following errors:

  usb 1-1: Device not responding to setup address.
  usb 1-1: device not accepting address 2, error -71
  usb 1-1: new low-speed USB device number 3 using xhci-hcd
  usb 1-1: Device not responding to setup address.
  usb 1-1: Device not responding to setup address.
  usb 1-1: device not accepting address 3, error -71
  usb usb1-port1: attempt power cycle

Based on the Logic analyzer waveforms, It has been identified that there
is skew of about 8nS b/w DP & DM linestate signals (o/p of PHY & i/p to
controller) at the UTMI interface, Due to this controller is seeing SE0
glitch condition, this is causing controller to pre-maturely assume that
PHY has sent all the data & is initiating next packet much early, though
in reality PHY is still busy sending previous packets.

Enabling the GUCTL1.FILTER_SE0_FSLS_EOP bit29 allows the controller to
ignore single SE0 glitches on the linestate during transmission. Only two
or more SE0 signals are recognized as a valid EOP.

When this feature is activated, SE0 signals on the linestate are validated
over two consecutive UTMI/ULPI clock edges for EOP detection.

Device mode (FS): If GUCTL1.FILTER_SE0_FSLS_EOP is set, then for device LPM
handshake, the controller ignores single SE0 glitch on the linestate during
transmit. Only two or more SE0 is considered as a valid EOP on FS port.

Host mode (FS/LS): If GUCTL1.FILTER_SE0_FSLS_EOP is set, then the controller
ignores single SE0 glitch on the linestate during transmit.

DT patch will be sent separately.

Changes in v2:
Included bindings update for the quirk.
Updated commit text for core patch.

Link to v1:
https://lore.kernel.org/all/20240823055642.27638-1-quic_uaggarwa@quicinc.com/

Uttkarsh Aggarwal (2):
  dt-bindings: usb: snps,dwc3: Add snps,filter-se0-fsls-eop quirk
  usb: dwc3: core: Add support to ignore single SE0 glitches

 .../devicetree/bindings/usb/snps,dwc3.yaml          |  6 ++++++
 drivers/usb/dwc3/core.c                             | 13 +++++++++++++
 drivers/usb/dwc3/core.h                             |  4 ++++
 3 files changed, 23 insertions(+)

-- 
2.17.1


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