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Message-ID: <20241017005800.1175419-2-alexey.klimov@linaro.org>
Date: Thu, 17 Oct 2024 01:57:59 +0100
From: Alexey Klimov <alexey.klimov@...aro.org>
To: konradybcio@...nel.org,
konrad.dybcio@....qualcomm.com,
andersson@...nel.org,
mturquette@...libre.com,
sboyd@...nel.org,
krzk+dt@...nel.org
Cc: robh@...nel.org,
conor+dt@...nel.org,
srinivas.kandagatla@...aro.org,
linux-arm-msm@...r.kernel.org,
linux-clk@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v1 1/2] dt-bindings: clock: Add Qualcomm SM6115 LPASS clock controller
From: Konrad Dybcio <konrad.dybcio@...aro.org>
SM6115 (and its derivatives or similar SoCs) has an LPASS clock
controller block which provides audio-related resets.
Add bindings for it.
Cc: Konrad Dybcio <konradybcio@...nel.org>
Cc: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Cc: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org>
[alexey.klimov] slightly changed the commit message
Signed-off-by: Alexey Klimov <alexey.klimov@...aro.org>
---
.../bindings/clock/qcom,sm6115-lpasscc.yaml | 53 +++++++++++++++++++
.../dt-bindings/clock/qcom,sm6115-lpasscc.h | 15 ++++++
2 files changed, 68 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm6115-lpasscc.yaml
create mode 100644 include/dt-bindings/clock/qcom,sm6115-lpasscc.h
diff --git a/Documentation/devicetree/bindings/clock/qcom,sm6115-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm6115-lpasscc.yaml
new file mode 100644
index 000000000000..58ee84aed073
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,sm6115-lpasscc.yaml
@@ -0,0 +1,53 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,sm6115-lpasscc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm LPASS Core & Audio Clock Controller on SM6115
+
+maintainers:
+ - Konrad Dybcio <konrad.dybcio@...aro.org>
+ - Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
+
+description: |
+ Qualcomm LPASS core and audio clock controllers provide audio-related resets
+ on SM6115 and its derivatives.
+
+ See also::
+ include/dt-bindings/clock/qcom,sm6115-lpasscc.h
+
+properties:
+ compatible:
+ enum:
+ - qcom,sm6115-lpassaudiocc
+ - qcom,sm6115-lpasscc
+
+ reg:
+ maxItems: 1
+
+ '#reset-cells':
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - '#reset-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ lpass_audiocc: clock-controller@...9000 {
+ compatible = "qcom,sm6115-lpassaudiocc";
+ reg = <0x0a6a9000 0x1000>;
+ #reset-cells = <1>;
+ };
+
+ - |
+ lpasscc: clock-controller@...c000 {
+ compatible = "qcom,sm6115-lpasscc";
+ reg = <0x0a7ec000 0x1000>;
+ #reset-cells = <1>;
+ };
+...
diff --git a/include/dt-bindings/clock/qcom,sm6115-lpasscc.h b/include/dt-bindings/clock/qcom,sm6115-lpasscc.h
new file mode 100644
index 000000000000..799274517c9a
--- /dev/null
+++ b/include/dt-bindings/clock/qcom,sm6115-lpasscc.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Copyright (c) 2023, Linaro Ltd.
+ */
+
+#ifndef _DT_BINDINGS_CLK_QCOM_LPASSCC_SM6115_H
+#define _DT_BINDINGS_CLK_QCOM_LPASSCC_SM6115_H
+
+/* LPASS CC */
+#define LPASS_SWR_TX_CONFIG_CGCR 0
+
+/* LPASS_AUDIO CC */
+#define LPASS_AUDIO_SWR_RX_CGCR 0
+
+#endif
--
2.45.2
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