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Message-Id: <20241018073417.2338864-4-quic_chunkaid@quicinc.com>
Date: Fri, 18 Oct 2024 15:34:17 +0800
From: Kyle Deng <quic_chunkaid@...cinc.com>
To: andersson@...nel.org, konradybcio@...nel.org, robh@...nel.org,
krzk+dt@...nel.org, conor+dt@...nel.org
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, quic_tingweiz@...cinc.com,
quic_aiquny@...cinc.com, quic_sudeepgo@...cinc.com,
quic_taozhan@...cinc.com, Kyle Deng <quic_chunkaid@...cinc.com>
Subject: [PATCH v2 3/3] arm64: dts: qcom: qcs615: add AOSS_QMP node
Add the Always-On Subsystem Qualcomm Message Protocol(AOSS_QMP) node for
QCS615 SoC. The AOSS_QMP enables the system to send and receive messages
on the SoC and uses the same hardware version as sdm845.
Signed-off-by: Kyle Deng <quic_chunkaid@...cinc.com>
---
arch/arm64/boot/dts/qcom/qcs615.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi
index ac4c4c751da1..a36debf36f82 100644
--- a/arch/arm64/boot/dts/qcom/qcs615.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi
@@ -512,6 +512,16 @@ pdc: interrupt-controller@...0000 {
interrupt-controller;
};
+ aoss_qmp: power-controller@...0000 {
+ compatible = "qcom,qcs615-aoss-qmp", "qcom,aoss-qmp";
+ reg = <0x0 0x0c300000 0x0 0x400>;
+ interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&apss_shared 0>;
+
+ #clock-cells = <0>;
+ #power-domain-cells = <1>;
+ };
+
sram@...0000 {
compatible = "qcom,rpmh-stats";
reg = <0x0 0x0c3f0000 0x0 0x400>;
@@ -528,6 +538,13 @@ intc: interrupt-controller@...00000 {
redistributor-stride = <0x0 0x20000>;
};
+ apss_shared: mailbox@...00000 {
+ compatible = "qcom,qcs615-apss-shared",
+ "qcom,sdm845-apss-shared";
+ reg = <0x0 0x17c00000 0x0 0x1000>;
+ #mbox-cells = <1>;
+ };
+
watchdog: watchdog@...10000 {
compatible = "qcom,apss-wdt-qcs615", "qcom,kpss-wdt";
reg = <0x0 0x17c10000 0x0 0x1000>;
--
2.34.1
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