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Message-ID: <ZxIrosY6-bkEc6XT@hovoldconsulting.com>
Date: Fri, 18 Oct 2024 11:34:26 +0200
From: Johan Hovold <johan@...nel.org>
To: Abel Vesa <abel.vesa@...aro.org>
Cc: Bjorn Andersson <andersson@...nel.org>,
	Michael Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...nel.org>,
	Rajendra Nayak <quic_rjendra@...cinc.com>,
	Konrad Dybcio <konradybcio@...nel.org>,
	Bryan O'Donoghue <bryan.odonoghue@...aro.org>,
	Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
	Sibi Sankar <quic_sibis@...cinc.com>, linux-arm-msm@...r.kernel.org,
	linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] clk: qcom: gcc-x1e80100: Fix USB MP SS1 PHY GDSC pwrsts
 flags

On Mon, Oct 14, 2024 at 05:58:23PM +0300, Abel Vesa wrote:
> Allowing these GDSCs to collapse makes the QMP combo PHYs lose their
> configuration on machine suspend. Currently, the QMP combo PHY driver
> doesn't reinitialise the HW on resume. Under such conditions, the USB
> SuperSpeed support is broken. To avoid this, mark the pwrsts flags with
> RET_ON. This has been already done for USB 0 and 1 SS PHY GDSCs,
> Do this USB MP SS1 PHY GDSC config. The USB MP SS1 PHY GDSC already has
> it.

s/Do this/Do this also for the/ (or similar)

The last sentence was supposed to say "SS0".

> Fixes: 161b7c401f4b ("clk: qcom: Add Global Clock controller (GCC) driver for X1E80100")
> Signed-off-by: Abel Vesa <abel.vesa@...aro.org>

Looks good otherwise:

Reviewed-by: Johan Hovold <johan+linaro@...nel.org>

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