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Message-ID: <m3ldylka9k.fsf@t19.piap.pl>
Date: Fri, 18 Oct 2024 11:53:11 +0200
From: Krzysztof Hałasa <khalasa@...p.pl>
To: Mauro Carvalho Chehab <mchehab+huawei@...nel.org>
Cc: Sakari Ailus <sakari.ailus@...ux.intel.com>,
  linux-kernel@...r.kernel.org,  linux-media@...r.kernel.org,
  stable@...r.kernel.org
Subject: Re: [PATCH v2 08/13] media: ar0521: don't overflow when checking
 PLL values

Hi Mauro,

Mauro Carvalho Chehab <mchehab+huawei@...nel.org> writes:

> The PLL checks are comparing 64 bit integers with 32 bit
> ones, as reported by Coverity. Depending on the values of
> the variables, this may underflow.
>
> Fix it ensuring that both sides of the expression are u64.
>
> Fixes: 852b50aeed15 ("media: On Semi AR0521 sensor driver")
> Cc: stable@...r.kernel.org
> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@...nel.org>
> Acked-by: Sakari Ailus <sakari.ailus@...ux.intel.com>

Acked-by: Krzysztof Hałasa <khalasa@...p.pl>

> --- a/drivers/media/i2c/ar0521.c
> +++ b/drivers/media/i2c/ar0521.c
> @@ -255,10 +255,10 @@ static u32 calc_pll(struct ar0521_dev *sensor, u32 freq, u16 *pre_ptr, u16 *mult
>                         continue; /* Minimum value */
>                 if (new_mult > 254)
>                         break; /* Maximum, larger pre won't work either */
> -               if (sensor->extclk_freq * (u64)new_mult < AR0521_PLL_MIN *
> +               if (sensor->extclk_freq * (u64)new_mult < (u64)AR0521_PLL_MIN *
>                     new_pre)
>                         continue;
> -               if (sensor->extclk_freq * (u64)new_mult > AR0521_PLL_MAX *
> +               if (sensor->extclk_freq * (u64)new_mult > (u64)AR0521_PLL_MAX *
>                     new_pre)
>                         break; /* Larger pre won't work either */
>                 new_pll = div64_round_up(sensor->extclk_freq * (u64)new_mult,
-- 
Krzysztof "Chris" Hałasa

Sieć Badawcza Łukasiewicz
Przemysłowy Instytut Automatyki i Pomiarów PIAP
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