[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20241019084738.3370489-9-claudiu.beznea.uj@bp.renesas.com>
Date: Sat, 19 Oct 2024 11:47:34 +0300
From: Claudiu <claudiu.beznea@...on.dev>
To: geert+renesas@...der.be,
mturquette@...libre.com,
sboyd@...nel.org,
robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
alexandre.belloni@...tlin.com,
magnus.damm@...il.com,
p.zabel@...gutronix.de
Cc: linux-renesas-soc@...r.kernel.org,
linux-clk@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
linux-rtc@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
claudiu.beznea@...on.dev,
Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
Subject: [PATCH v4 08/12] arm64: dts: renesas: r9a08g045: Add VBATTB node
From: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
Add the DT node for the VBATTB IP along with DT bindings for the clock
it provides.
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
---
Changes in v4:
- used clock-controller for the vbattb node name
- move the node near scif0 for ordering
- set the vbattb_xtal status as disabled to avoid having it exported
in linux with frequency = 0 in boards that don't use it
- collected tags
Changes in v3:
- dropped the child nodes of vbattb; along with this dropped ranges,
interrupt-names, #address-cells, #size-cells
- added vbattb_xtal as input clock for vbattb
Changes in v2:
- update compatibles
- updated clocks and clock-names for clock-controller node
- removed the power domain from the clock-controller as this is
controlled by parent node in v2
arch/arm64/boot/dts/renesas/r9a08g045.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi
index 067a26a66c24..827db9f61802 100644
--- a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi
@@ -72,6 +72,18 @@ scif0: serial@...4b800 {
status = "disabled";
};
+ vbattb: clock-controller@...5c000 {
+ compatible = "renesas,r9a08g045-vbattb";
+ reg = <0 0x1005c000 0 0x1000>;
+ interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A08G045_VBAT_BCLK>, <&vbattb_xtal>;
+ clock-names = "bclk", "rtx";
+ #clock-cells = <1>;
+ power-domains = <&cpg>;
+ resets = <&cpg R9A08G045_VBAT_BRESETN>;
+ status = "disabled";
+ };
+
i2c0: i2c@...90000 {
compatible = "renesas,riic-r9a08g045", "renesas,riic-r9a09g057";
reg = <0 0x10090000 0 0x400>;
@@ -425,4 +437,12 @@ timer {
interrupt-names = "sec-phys", "phys", "virt", "hyp-phys",
"hyp-virt";
};
+
+ vbattb_xtal: vbattb-xtal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board. */
+ clock-frequency = <0>;
+ status = "disabled";
+ };
};
--
2.39.2
Powered by blists - more mailing lists