linux-kernel - [RFC PATCH nand/next 0/4] mtd: nand: spi: Add CASN page support

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Message-ID: <20241020132722.20565-1-SkyLake.Huang@mediatek.com>
Date: Sun, 20 Oct 2024 21:27:18 +0800
From: Sky Huang <SkyLake.Huang@...iatek.com>
To: Matthias Brugger <matthias.bgg@...il.com>, Miquel Raynal
	<miquel.raynal@...tlin.com>, AngeloGioacchino Del Regno
	<angelogioacchino.delregno@...labora.com>, Richard Weinberger
	<richard@....at>, Vignesh Raghavendra <vigneshr@...com>, Daniel Golle
	<daniel@...rotopia.org>, Chia-Lin Kao <acelan.kao@...onical.com>, Mika
 Westerberg <mika.westerberg@...ux.intel.com>, Cheng Ming Lin
	<chengminglin@...c.com.tw>, <linux-kernel@...r.kernel.org>,
	<linux-mtd@...ts.infradead.org>, <linux-arm-kernel@...ts.infradead.org>,
	<linux-mediatek@...ts.infradead.org>
CC: Steven Liu <Steven.Liu@...iatek.com>, Sky Huang
	<skylake.huang@...iatek.com>
Subject: [RFC PATCH nand/next 0/4] mtd: nand: spi: Add CASN page support

From: "Sky Huang" <skylake.huang@...iatek.com>

Hi, this is Qi-Ze Huang(Sky Huang) from MediaTek. On our router platforms
chips, we have to quality lots of SPI-NAND devices and are eager for
a standard so that we don't need to maintain trivial flash ID table
anymore. I also noticed a talk in 2019 Embedded Linux Conference,
Memory Technology Devices: what's new, which mentioned "ONFI for
SPI-NANDs? Maybe, maybe not".

So earlier this year, I proposed a bold idea, CASN page (Common Attributes
for SPI-NAND). I worked together with top 3 SPI-NAND market share flash
vendors and other vendors to integrate CASN page on their SPI-NAND devices
including but not limited to:
[ESMT]
F50L1G41LB
F50L2G41KA

[Etron]
EM73C044VCF-H
EM73D044VCO-H
EM73E044VCE-H
EM73F044VCA-H

[GigaDevice]
GD5F1GM7UE
GD5F1GQ5UEYIG
GD5F2GM7UE
GD5F2GQ5UEYIG
GD5F4GM8UE
GD5F4GQ6UEYIG

[Macronix (MXIC)]
MX35LF1GE4ABZ4IG

[Winbond]
W25N01GV
W25N01KV
W25N02KV
W25N04KV

A document of CASN is hosted on github(https://github.com/mtk-openwrt/
doc/blob/main/CASN%20Page%20Introduction.pdf) So I'll try to keep it
simple here.

With CASN page, we don't need to maintain SPI-NAND flash ID table anymore.
Currently, it's integrated in 3.3V SPI-NANDs of small density and it's not
JEDEC standard yet. But it should be able to handle 1.8V and can be easily
integrated by flash vendors.

I believe this idea and implementation have room for improvement. Hope to
hear you open source community's comments soon.

Signed-off-by: Sky Huang <skylake.huang@...iatek.com>
---
Sky Huang (4):
  mtd: nand: Create param.c to do CRC check and bitwise majority for
    Parameter & CASN page
  include: mtd: Add CASN page definition and related structs.
  include: mtd: spinand: Add CASN page related macros and flags.
  mtd: nand: spi: Add CASN page support

 drivers/mtd/nand/Makefile        |   2 +-
 drivers/mtd/nand/param.c         |  52 +++
 drivers/mtd/nand/raw/nand_onfi.c |  43 +-
 drivers/mtd/nand/spi/core.c      | 741 ++++++++++++++++++++++++++++++-
 include/linux/mtd/casn.h         | 191 ++++++++
 include/linux/mtd/param.h        |  20 +
 include/linux/mtd/spinand.h      | 100 ++++-
 7 files changed, 1094 insertions(+), 55 deletions(-)
 create mode 100644 drivers/mtd/nand/param.c
 create mode 100644 include/linux/mtd/casn.h
 create mode 100644 include/linux/mtd/param.h

-- 
2.45.2