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Message-Id: <20241021163437.1007507-2-Frank.Li@nxp.com>
Date: Mon, 21 Oct 2024 12:34:33 -0400
From: Frank Li <Frank.Li@....com>
To: shawnguo2@...h.net
Cc: Frank.Li@....com,
conor+dt@...nel.org,
devicetree@...r.kernel.org,
festevam@...il.com,
imx@...ts.linux.dev,
kernel@...gutronix.de,
krzk+dt@...nel.org,
linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org,
robh@...nel.org,
s.hauer@...gutronix.de,
shawnguo@...nel.org
Subject: [PATCH v2 2/6] arm64: dts: imx8qxp-mek: add esai, cs42888 and related node
Add audio codec cs42888 and related node.
Signed-off-by: Frank Li <Frank.Li@....com>
---
change from v1 to v2
- remove extra space
- remove unnecessary status = "okay"
---
arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 82 +++++++++++++++++++
1 file changed, 82 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
index d8d9e2883caf7..da8ceffdc7212 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
@@ -50,6 +50,13 @@ usb3_data_ss: endpoint {
};
};
+ reg_audio: regulator-audio {
+ compatible = "regulator-fixed";
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "cs42888_supply";
+ };
+
sound-bt-sco {
compatible = "simple-audio-card";
simple-audio-card,bitclock-inversion;
@@ -69,6 +76,27 @@ btcpu: simple-audio-card,cpu {
};
};
+ sound-cs42888 {
+ compatible = "fsl,imx-audio-cs42888";
+ audio-asrc = <&asrc0>;
+ audio-codec = <&cs42888>;
+ audio-cpu = <&esai0>;
+ audio-routing =
+ "Line Out Jack", "AOUT1L",
+ "Line Out Jack", "AOUT1R",
+ "Line Out Jack", "AOUT2L",
+ "Line Out Jack", "AOUT2R",
+ "Line Out Jack", "AOUT3L",
+ "Line Out Jack", "AOUT3R",
+ "Line Out Jack", "AOUT4L",
+ "Line Out Jack", "AOUT4R",
+ "AIN1L", "Line In Jack",
+ "AIN1R", "Line In Jack",
+ "AIN2L", "Line In Jack",
+ "AIN2R", "Line In Jack";
+ model = "imx-cs42888";
+ };
+
sound-wm8960 {
compatible = "fsl,imx-audio-wm8960";
model = "wm8960-audio";
@@ -86,6 +114,15 @@ sound-wm8960 {
};
};
+&amix {
+ status = "okay";
+};
+
+&asrc0 {
+ fsl,asrc-rate = <48000>;
+ status = "okay";
+};
+
&dsp {
memory-region = <&dsp_reserved>;
status = "okay";
@@ -95,6 +132,19 @@ &dsp_reserved {
status = "okay";
};
+&esai0 {
+ assigned-clocks = <&acm IMX_ADMA_ACM_ESAI0_MCLK_SEL>,
+ <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
+ <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>,
+ <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>,
+ <&esai0_lpcg 0>;
+ assigned-clock-parents = <&aud_pll_div0_lpcg 0>;
+ assigned-clock-rates = <0>, <786432000>, <49152000>, <12288000>, <49152000>;
+ pinctrl-0 = <&pinctrl_esai0>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec1>;
@@ -264,6 +314,23 @@ pca6416: gpio@20 {
gpio-controller;
#gpio-cells = <2>;
};
+
+ cs42888: audio-codec@48 {
+ compatible = "cirrus,cs42888";
+ reg = <0x48>;
+ clocks = <&mclkout0_lpcg 0>;
+ clock-names = "mclk";
+ assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
+ <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>,
+ <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>,
+ <&mclkout0_lpcg 0>;
+ assigned-clock-rates = <786432000>, <49152000>, <12288000>, <12288000>;
+ reset-gpios = <&pca9557_b 1 GPIO_ACTIVE_LOW>;
+ VA-supply = <®_audio>;
+ VD-supply = <®_audio>;
+ VLC-supply = <®_audio>;
+ VLS-supply = <®_audio>;
+ };
};
&cm40_intmux {
@@ -458,6 +525,21 @@ IMX8QXP_ADC_IN0_LSIO_GPIO1_IO10 0xc600004c
>;
};
+ pinctrl_esai0: esai0grp {
+ fsl,pins = <
+ IMX8QXP_ESAI0_FSR_ADMA_ESAI0_FSR 0xc6000040
+ IMX8QXP_ESAI0_FST_ADMA_ESAI0_FST 0xc6000040
+ IMX8QXP_ESAI0_SCKR_ADMA_ESAI0_SCKR 0xc6000040
+ IMX8QXP_ESAI0_SCKT_ADMA_ESAI0_SCKT 0xc6000040
+ IMX8QXP_ESAI0_TX0_ADMA_ESAI0_TX0 0xc6000040
+ IMX8QXP_ESAI0_TX1_ADMA_ESAI0_TX1 0xc6000040
+ IMX8QXP_ESAI0_TX2_RX3_ADMA_ESAI0_TX2_RX3 0xc6000040
+ IMX8QXP_ESAI0_TX3_RX2_ADMA_ESAI0_TX3_RX2 0xc6000040
+ IMX8QXP_ESAI0_TX4_RX1_ADMA_ESAI0_TX4_RX1 0xc6000040
+ IMX8QXP_ESAI0_TX5_RX0_ADMA_ESAI0_TX5_RX0 0xc6000040
+ >;
+ };
+
pinctrl_fec1: fec1grp {
fsl,pins = <
IMX8QXP_ENET0_MDC_CONN_ENET0_MDC 0x06000020
--
2.34.1
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