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Message-ID: <10e0ebf0-f11d-4c69-9821-c8830495c4bd@amd.com>
Date: Mon, 21 Oct 2024 13:17:34 -0500
From: Mario Limonciello <mario.limonciello@....com>
To: Borislav Petkov <bp@...en8.de>
Cc: Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>,
 Dave Hansen <dave.hansen@...ux.intel.com>,
 "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" <x86@...nel.org>,
 "H . Peter Anvin" <hpa@...or.com>, "Rafael J . Wysocki" <rafael@...nel.org>,
 "Gautham R . Shenoy" <gautham.shenoy@....com>,
 Perry Yuan <perry.yuan@....com>, Brijesh Singh <brijesh.singh@....com>,
 Peter Zijlstra <peterz@...radead.org>, Li RongQing <lirongqing@...du.com>,
 "open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)"
 <linux-kernel@...r.kernel.org>, "open list:ACPI"
 <linux-acpi@...r.kernel.org>,
 "open list:AMD PSTATE DRIVER" <linux-pm@...r.kernel.org>
Subject: Re: [PATCH 2/4] x86/cpufeatures: Rename
 X86_FEATURE_HETERO_CORE_TOPOLOGY to X86_FEATURE_AMD_HETEROGENEOUS_CORES

On 10/21/2024 12:55, Mario Limonciello wrote:
> X86_FEATURE_AMD_HETEROGENEOUS_CORES makes it clear this is an AMD feature
> and matches the APM value of HeterogeneousCores
> 
> Suggested-by: Borislav Petkov <bp@...en8.de>
> Signed-off-by: Mario Limonciello <mario.limonciello@....com>
> ---
>   arch/x86/include/asm/cpufeatures.h | 2 +-
>   arch/x86/kernel/cpu/amd.c          | 2 +-
>   arch/x86/kernel/cpu/scattered.c    | 2 +-
>   3 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
> index 424bb7ae8914a..7f6c9fc465293 100644
> --- a/arch/x86/include/asm/cpufeatures.h
> +++ b/arch/x86/include/asm/cpufeatures.h
> @@ -473,7 +473,7 @@
>   #define X86_FEATURE_CLEAR_BHB_HW	(21*32+ 3) /* BHI_DIS_S HW control enabled */
>   #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* Clear branch history at vmexit using SW loop */
>   #define X86_FEATURE_AMD_FAST_CPPC		(21*32 + 5) /* Fast CPPC */
> -#define X86_FEATURE_HETERO_CORE_TOPOLOGY	(21*32 + 6) /* Heterogeneous Core Topology */
> +#define X86_FEATURE_AMD_HETEROGENEOUS_CORES	(21*32 + 6) /* Heterogeneous Core Topology */
>   
>   /*
>    * BUG word(s)
> diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
> index 8ad5f1385f0ec..0f533e6260d29 100644
> --- a/arch/x86/kernel/cpu/amd.c
> +++ b/arch/x86/kernel/cpu/amd.c
> @@ -1223,7 +1223,7 @@ enum amd_core_type amd_get_core_type(void)
>   		     core_type                  :4;
>   	} props;
>   
> -	if (!cpu_feature_enabled(X86_FEATURE_HETERO_CORE_TOPOLOGY))
> +	if (!cpu_feature_enabled(X86_FEATURE_AMD_HETEROGENEOUS_CORES))
>   		return CPU_CORE_TYPE_NO_HETERO_SUP;
>   
>   	cpuid_leaf_reg(0x80000026, CPUID_EBX, &props);
> diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
> index d7f2c19abce33..307a917415343 100644
> --- a/arch/x86/kernel/cpu/scattered.c
> +++ b/arch/x86/kernel/cpu/scattered.c
> @@ -52,7 +52,7 @@ static const struct cpuid_bit cpuid_bits[] = {
>   	{ X86_FEATURE_PERFMON_V2,	CPUID_EAX,  0, 0x80000022, 0 },
>   	{ X86_FEATURE_AMD_LBR_V2,	CPUID_EAX,  1, 0x80000022, 0 },
>   	{ X86_FEATURE_AMD_LBR_PMC_FREEZE,	CPUID_EAX,  2, 0x80000022, 0 },
> -	{ X86_FEATURE_HETERO_CORE_TOPOLOGY,	CPUID_EAX,  30, 0x80000026, 0 },
> +	{ X86_FEATURE_AMD_HETEROGENEOUS_CORES,	CPUID_EAX,  30, 0x80000026, 0 },
>   	{ 0, 0, 0, 0, 0 }
>   };
>   


I talked to Boris offline about this and I misinterpreted Rafael's 
intent with "the former".  The original patches will need to be dropped 
and I will redo patches 2 and 4 in this series considering that.

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