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Message-ID: <01cbb389-1966-4501-a22d-7227765d1eb9@quicinc.com>
Date: Mon, 21 Oct 2024 11:11:13 +0530
From: Sricharan Ramabadhran <quic_srichara@...cinc.com>
To: Krzysztof Kozlowski <krzk@...nel.org>
CC: <andersson@...nel.org>, <konradybcio@...nel.org>, <robh@...nel.org>,
<krzk+dt@...nel.org>, <conor+dt@...nel.org>, <mturquette@...libre.com>,
<sboyd@...nel.org>, <ulf.hansson@...aro.org>,
<linus.walleij@...aro.org>, <catalin.marinas@....com>,
<p.zabel@...gutronix.de>, <geert+renesas@...der.be>,
<dmitry.baryshkov@...aro.org>, <neil.armstrong@...aro.org>,
<linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <linux-clk@...r.kernel.org>,
<linux-mmc@...r.kernel.org>, <linux-gpio@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>, <quic_varada@...cinc.com>
Subject: Re: [PATCH V4 2/6] dt-bindings: clock: Add Qualcomm IPQ5424 GCC
binding
On 10/18/2024 11:43 AM, Krzysztof Kozlowski wrote:
> On Thu, Oct 17, 2024 at 06:06:22PM +0530, Sricharan R wrote:
>> From: Sricharan Ramabadhran <quic_srichara@...cinc.com>
>>
>> Add binding for the Qualcomm IPQ5424 Global Clock Controller
>>
>> Signed-off-by: Sricharan Ramabadhran <quic_srichara@...cinc.com>
>> ---
>> [V4] Added 2 new PCIE clks to end of the list, preserving default order
>>
>> .../bindings/clock/qcom,ipq5332-gcc.yaml | 40 ++-
>> include/dt-bindings/clock/qcom,ipq5424-gcc.h | 156 +++++++++
>> include/dt-bindings/reset/qcom,ipq5424-gcc.h | 310 ++++++++++++++++++
>> 3 files changed, 499 insertions(+), 7 deletions(-)
>> create mode 100644 include/dt-bindings/clock/qcom,ipq5424-gcc.h
>> create mode 100644 include/dt-bindings/reset/qcom,ipq5424-gcc.h
>>
>> diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml
>> index 9193de681de2..ef1fd9d9f8da 100644
>> --- a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml
>> +++ b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml
>> @@ -4,31 +4,35 @@
>> $id: http://devicetree.org/schemas/clock/qcom,ipq5332-gcc.yaml#
>> $schema: http://devicetree.org/meta-schemas/core.yaml#
>>
>> -title: Qualcomm Global Clock & Reset Controller on IPQ5332
>> +title: Qualcomm Global Clock & Reset Controller on IPQ5332 and IPQ5424
>>
>> maintainers:
>> - Bjorn Andersson <andersson@...nel.org>
>>
>> description: |
>> Qualcomm global clock control module provides the clocks, resets and power
>> - domains on IPQ5332.
>> + domains on IPQ5332 and IPQ5424.
>>
>> - See also:: include/dt-bindings/clock/qcom,gcc-ipq5332.h
>> -
>> -allOf:
>> - - $ref: qcom,gcc.yaml#
>> + See also:
>> + include/dt-bindings/clock/qcom,gcc-ipq5332.h
>> + include/dt-bindings/clock/qcom,gcc-ipq5424.h
>>
>> properties:
>> compatible:
>> - const: qcom,ipq5332-gcc
>> + enum:
>> + - qcom,ipq5332-gcc
>> + - qcom,ipq5424-gcc
>>
>> clocks:
>> + minItems: 5
>> items:
>> - description: Board XO clock source
>> - description: Sleep clock source
>> - description: PCIE 2lane PHY pipe clock source
>> - description: PCIE 2lane x1 PHY pipe clock source (For second lane)
>> - description: USB PCIE wrapper pipe clock source
>> + - description: PCIE 2-lane PHY2 pipe clock source
>> + - description: PCIE 2-lane PHY3 pipe clock source
>>
>> '#power-domain-cells': false
>> '#interconnect-cells':
>> @@ -38,6 +42,28 @@ required:
>> - compatible
>> - clocks
>>
>> +allOf:
>> + - $ref: qcom,gcc.yaml#
>> + - if:
>> + properties:
>> + compatible:
>> + contains:
>> + const: qcom,ipq5332-gcc
>> + then:
>> + properties:
>> + clocks:
>> + maxItems: 5
>> +
>> + - if:
>> + properties:
>> + compatible:
>> + contains:
>> + const: qcom,ipq5424-gcc
>> + then:
>> + properties:
>> + clocks:
>
> This needs minItems: 7, unless clocks are really optional (but they
> shouldn't be optional). I think I missed this part last time.
ok, got it, will update and send V5.
Regards,
Sricharan
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