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Message-ID: <tm7jtf3swggiilznwo3xcqjlhd2a7cguwk3nay3bhmaxo23mf5@qw2fyjwapoxe>
Date: Mon, 21 Oct 2024 18:08:59 +0800
From: Inochi Amaoto <inochiama@...il.com>
To: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>,
Inochi Amaoto <inochiama@...il.com>
Cc: Chen Wang <unicorn_wang@...look.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>, Jiri Slaby <jirislaby@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>, Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>,
Inochi Amaoto <inochiama@...look.com>, Yixun Lan <dlan@...too.org>, LKML <linux-kernel@...r.kernel.org>,
linux-serial <linux-serial@...r.kernel.org>, devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v2 2/2] serial: 8250_dw: Add Sophgo SG2044 quirk
On Mon, Oct 21, 2024 at 11:52:38AM +0300, Ilpo Järvinen wrote:
> On Mon, 21 Oct 2024, Inochi Amaoto wrote:
>
> > SG2044 relys on an internal divisor when calculating bitrate, which
> > means a wrong clock for the most common bitrates. So add a quirk for
> > this uart device to skip the set rate call and only relys on the
> > internal UART divisor.
> >
> > Signed-off-by: Inochi Amaoto <inochiama@...il.com>
>
> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
>
> I wonder though does this mean the numbers userspace can read from kernel
> are bogus and if something can be done about that?
>
I am not sure whether the clock rate can be read by the userspace.
At least it report the right baud speed by using stty.
Regards,
Inochi
>
> > ---
> > drivers/tty/serial/8250/8250_dw.c | 5 +++--
> > 1 file changed, 3 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
> > index ab9e7f204260..51894c93c8a3 100644
> > --- a/drivers/tty/serial/8250/8250_dw.c
> > +++ b/drivers/tty/serial/8250/8250_dw.c
> > @@ -750,7 +750,7 @@ static const struct dw8250_platform_data dw8250_renesas_rzn1_data = {
> > .quirks = DW_UART_QUIRK_CPR_VALUE | DW_UART_QUIRK_IS_DMA_FC,
> > };
> >
> > -static const struct dw8250_platform_data dw8250_starfive_jh7100_data = {
> > +static const struct dw8250_platform_data dw8250_skip_set_rate_data = {
> > .usr_reg = DW_UART_USR,
> > .quirks = DW_UART_QUIRK_SKIP_SET_RATE,
> > };
> > @@ -760,7 +760,8 @@ static const struct of_device_id dw8250_of_match[] = {
> > { .compatible = "cavium,octeon-3860-uart", .data = &dw8250_octeon_3860_data },
> > { .compatible = "marvell,armada-38x-uart", .data = &dw8250_armada_38x_data },
> > { .compatible = "renesas,rzn1-uart", .data = &dw8250_renesas_rzn1_data },
> > - { .compatible = "starfive,jh7100-uart", .data = &dw8250_starfive_jh7100_data },
> > + { .compatible = "sophgo,sg2044-uart", .data = &dw8250_skip_set_rate_data },
> > + { .compatible = "starfive,jh7100-uart", .data = &dw8250_skip_set_rate_data },
> > { /* Sentinel */ }
> > };
> > MODULE_DEVICE_TABLE(of, dw8250_of_match);
> >
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